[llvm] c8ed138 - [RISCV] Remove unneeded fixup kinds for R_RISCV_{SET,ADD,SUB}*
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 9 12:54:06 PDT 2023
Author: Fangrui Song
Date: 2023-08-09T12:54:02-07:00
New Revision: c8ed138c34ddb22610f18468c1b7938f9e2abae5
URL: https://github.com/llvm/llvm-project/commit/c8ed138c34ddb22610f18468c1b7938f9e2abae5
DIFF: https://github.com/llvm/llvm-project/commit/c8ed138c34ddb22610f18468c1b7938f9e2abae5.diff
LOG: [RISCV] Remove unneeded fixup kinds for R_RISCV_{SET,ADD,SUB}*
These 8/16/32/64 fixup kinds from D103539 are no longer needed after
D155357.
R_RISCV_SET6/R_RISCV_SUB6 are unneeded even before D155357.
`return Value & 0x03` is incorrect, and the non-zero TargetOffset is
probably to affect applyFixup, but the relevant code is dead as Value == 0.
Added:
Modified:
llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
index 85cf21c096b7c0..1c4f81eb730b76 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
@@ -80,24 +80,6 @@ RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
{"fixup_riscv_call_plt", 0, 64, MCFixupKindInfo::FKF_IsPCRel},
{"fixup_riscv_relax", 0, 0, 0},
{"fixup_riscv_align", 0, 0, 0},
-
- {"fixup_riscv_set_8", 0, 8, 0},
- {"fixup_riscv_add_8", 0, 8, 0},
- {"fixup_riscv_sub_8", 0, 8, 0},
-
- {"fixup_riscv_set_16", 0, 16, 0},
- {"fixup_riscv_add_16", 0, 16, 0},
- {"fixup_riscv_sub_16", 0, 16, 0},
-
- {"fixup_riscv_set_32", 0, 32, 0},
- {"fixup_riscv_add_32", 0, 32, 0},
- {"fixup_riscv_sub_32", 0, 32, 0},
-
- {"fixup_riscv_add_64", 0, 64, 0},
- {"fixup_riscv_sub_64", 0, 64, 0},
-
- {"fixup_riscv_set_6b", 2, 6, 0},
- {"fixup_riscv_sub_6b", 2, 6, 0},
};
static_assert((std::size(Infos)) == RISCV::NumTargetFixupKinds,
"Not all fixup kinds added to Infos array");
@@ -306,27 +288,31 @@ bool RISCVAsmBackend::relaxDwarfCFA(MCDwarfCallFrameFragment &DF,
auto AddFixups = [&Fixups, &AddrDelta](unsigned Offset,
std::pair<unsigned, unsigned> Fixup) {
const MCBinaryExpr &MBE = cast<MCBinaryExpr>(AddrDelta);
- Fixups.push_back(MCFixup::create(
- Offset, MBE.getLHS(), static_cast<MCFixupKind>(std::get<0>(Fixup))));
- Fixups.push_back(MCFixup::create(
- Offset, MBE.getRHS(), static_cast<MCFixupKind>(std::get<1>(Fixup))));
+ Fixups.push_back(
+ MCFixup::create(Offset, MBE.getLHS(),
+ static_cast<MCFixupKind>(FirstLiteralRelocationKind +
+ std::get<0>(Fixup))));
+ Fixups.push_back(
+ MCFixup::create(Offset, MBE.getRHS(),
+ static_cast<MCFixupKind>(FirstLiteralRelocationKind +
+ std::get<1>(Fixup))));
};
if (isUIntN(6, Value)) {
OS << uint8_t(dwarf::DW_CFA_advance_loc);
- AddFixups(0, {RISCV::fixup_riscv_set_6b, RISCV::fixup_riscv_sub_6b});
+ AddFixups(0, {ELF::R_RISCV_SET6, ELF::R_RISCV_SUB6});
} else if (isUInt<8>(Value)) {
OS << uint8_t(dwarf::DW_CFA_advance_loc1);
support::endian::write<uint8_t>(OS, 0, support::little);
- AddFixups(1, {RISCV::fixup_riscv_set_8, RISCV::fixup_riscv_sub_8});
+ AddFixups(1, {ELF::R_RISCV_SET8, ELF::R_RISCV_SUB8});
} else if (isUInt<16>(Value)) {
OS << uint8_t(dwarf::DW_CFA_advance_loc2);
support::endian::write<uint16_t>(OS, 0, support::little);
- AddFixups(1, {RISCV::fixup_riscv_set_16, RISCV::fixup_riscv_sub_16});
+ AddFixups(1, {ELF::R_RISCV_SET16, ELF::R_RISCV_SUB16});
} else if (isUInt<32>(Value)) {
OS << uint8_t(dwarf::DW_CFA_advance_loc4);
support::endian::write<uint32_t>(OS, 0, support::little);
- AddFixups(1, {RISCV::fixup_riscv_set_32, RISCV::fixup_riscv_sub_32});
+ AddFixups(1, {ELF::R_RISCV_SET32, ELF::R_RISCV_SUB32});
} else {
llvm_unreachable("unsupported CFA encoding");
}
@@ -405,25 +391,12 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
case RISCV::fixup_riscv_tls_got_hi20:
case RISCV::fixup_riscv_tls_gd_hi20:
llvm_unreachable("Relocation should be unconditionally forced\n");
- case RISCV::fixup_riscv_set_8:
- case RISCV::fixup_riscv_add_8:
- case RISCV::fixup_riscv_sub_8:
- case RISCV::fixup_riscv_set_16:
- case RISCV::fixup_riscv_add_16:
- case RISCV::fixup_riscv_sub_16:
- case RISCV::fixup_riscv_set_32:
- case RISCV::fixup_riscv_add_32:
- case RISCV::fixup_riscv_sub_32:
- case RISCV::fixup_riscv_add_64:
- case RISCV::fixup_riscv_sub_64:
case FK_Data_1:
case FK_Data_2:
case FK_Data_4:
case FK_Data_8:
case FK_Data_6b:
return Value;
- case RISCV::fixup_riscv_set_6b:
- return Value & 0x03;
case RISCV::fixup_riscv_lo12_i:
case RISCV::fixup_riscv_pcrel_lo12_i:
case RISCV::fixup_riscv_tprel_lo12_i:
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
index db7dc1aed7fc1e..7a959dbb6390b6 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
@@ -89,22 +89,6 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
return ELF::R_RISCV_CALL_PLT;
case RISCV::fixup_riscv_call_plt:
return ELF::R_RISCV_CALL_PLT;
- case RISCV::fixup_riscv_add_8:
- return ELF::R_RISCV_ADD8;
- case RISCV::fixup_riscv_sub_8:
- return ELF::R_RISCV_SUB8;
- case RISCV::fixup_riscv_add_16:
- return ELF::R_RISCV_ADD16;
- case RISCV::fixup_riscv_sub_16:
- return ELF::R_RISCV_SUB16;
- case RISCV::fixup_riscv_add_32:
- return ELF::R_RISCV_ADD32;
- case RISCV::fixup_riscv_sub_32:
- return ELF::R_RISCV_SUB32;
- case RISCV::fixup_riscv_add_64:
- return ELF::R_RISCV_ADD64;
- case RISCV::fixup_riscv_sub_64:
- return ELF::R_RISCV_SUB64;
}
}
@@ -143,32 +127,6 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
return ELF::R_RISCV_RELAX;
case RISCV::fixup_riscv_align:
return ELF::R_RISCV_ALIGN;
- case RISCV::fixup_riscv_set_6b:
- return ELF::R_RISCV_SET6;
- case RISCV::fixup_riscv_sub_6b:
- return ELF::R_RISCV_SUB6;
- case RISCV::fixup_riscv_add_8:
- return ELF::R_RISCV_ADD8;
- case RISCV::fixup_riscv_set_8:
- return ELF::R_RISCV_SET8;
- case RISCV::fixup_riscv_sub_8:
- return ELF::R_RISCV_SUB8;
- case RISCV::fixup_riscv_set_16:
- return ELF::R_RISCV_SET16;
- case RISCV::fixup_riscv_add_16:
- return ELF::R_RISCV_ADD16;
- case RISCV::fixup_riscv_sub_16:
- return ELF::R_RISCV_SUB16;
- case RISCV::fixup_riscv_set_32:
- return ELF::R_RISCV_SET32;
- case RISCV::fixup_riscv_add_32:
- return ELF::R_RISCV_ADD32;
- case RISCV::fixup_riscv_sub_32:
- return ELF::R_RISCV_SUB32;
- case RISCV::fixup_riscv_add_64:
- return ELF::R_RISCV_ADD64;
- case RISCV::fixup_riscv_sub_64:
- return ELF::R_RISCV_SUB64;
}
}
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
index 5727aab3cd4cad..f3d0841eb6bca6 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h
@@ -9,6 +9,7 @@
#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
+#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCFixup.h"
#include <utility>
@@ -70,42 +71,6 @@ enum Fixups {
// Used to generate an R_RISCV_ALIGN relocation, which indicates the linker
// should fixup the alignment after linker relaxation.
fixup_riscv_align,
- // 8-bit fixup corresponding to R_RISCV_SET8 for local label assignment.
- fixup_riscv_set_8,
- // 8-bit fixup corresponding to R_RISCV_ADD8 for 8-bit symbolic
diff erence
- // paired relocations.
- fixup_riscv_add_8,
- // 8-bit fixup corresponding to R_RISCV_SUB8 for 8-bit symbolic
diff erence
- // paired relocations.
- fixup_riscv_sub_8,
- // 16-bit fixup corresponding to R_RISCV_SET16 for local label assignment.
- fixup_riscv_set_16,
- // 16-bit fixup corresponding to R_RISCV_ADD16 for 16-bit symbolic
diff erence
- // paired reloctions.
- fixup_riscv_add_16,
- // 16-bit fixup corresponding to R_RISCV_SUB16 for 16-bit symbolic
diff erence
- // paired reloctions.
- fixup_riscv_sub_16,
- // 32-bit fixup corresponding to R_RISCV_SET32 for local label assignment.
- fixup_riscv_set_32,
- // 32-bit fixup corresponding to R_RISCV_ADD32 for 32-bit symbolic
diff erence
- // paired relocations.
- fixup_riscv_add_32,
- // 32-bit fixup corresponding to R_RISCV_SUB32 for 32-bit symbolic
diff erence
- // paired relocations.
- fixup_riscv_sub_32,
- // 64-bit fixup corresponding to R_RISCV_ADD64 for 64-bit symbolic
diff erence
- // paired relocations.
- fixup_riscv_add_64,
- // 64-bit fixup corresponding to R_RISCV_SUB64 for 64-bit symbolic
diff erence
- // paired relocations.
- fixup_riscv_sub_64,
- // 6-bit fixup corresponding to R_RISCV_SET6 for local label assignment in
- // DWARF CFA.
- fixup_riscv_set_6b,
- // 6-bit fixup corresponding to R_RISCV_SUB6 for local label assignment in
- // DWARF CFA.
- fixup_riscv_sub_6b,
// Used as a sentinel, must be the last
fixup_riscv_invalid,
@@ -118,17 +83,21 @@ getRelocPairForSize(unsigned Size) {
default:
llvm_unreachable("unsupported fixup size");
case 1:
- return std::make_pair(MCFixupKind(RISCV::fixup_riscv_add_8),
- MCFixupKind(RISCV::fixup_riscv_sub_8));
+ return std::make_pair(
+ MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD8),
+ MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB8));
case 2:
- return std::make_pair(MCFixupKind(RISCV::fixup_riscv_add_16),
- MCFixupKind(RISCV::fixup_riscv_sub_16));
+ return std::make_pair(
+ MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD16),
+ MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB16));
case 4:
- return std::make_pair(MCFixupKind(RISCV::fixup_riscv_add_32),
- MCFixupKind(RISCV::fixup_riscv_sub_32));
+ return std::make_pair(
+ MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD32),
+ MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB32));
case 8:
- return std::make_pair(MCFixupKind(RISCV::fixup_riscv_add_64),
- MCFixupKind(RISCV::fixup_riscv_sub_64));
+ return std::make_pair(
+ MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD64),
+ MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB64));
}
}
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