[llvm] 4f818da - [ValueTracking] Add support for `fshl`/`fshr` in `isKnownToBeAPowerOfTwo`

[Noah Goldstein via llvm-commits]

Author: Noah Goldstein
Date: 2023-08-09T14:42:55-05:00
New Revision: 4f818daca64ccec5557c10a05186837cf9fcd0f7

URL: https://github.com/llvm/llvm-project/commit/4f818daca64ccec5557c10a05186837cf9fcd0f7
DIFF: https://github.com/llvm/llvm-project/commit/4f818daca64ccec5557c10a05186837cf9fcd0f7.diff

LOG: [ValueTracking] Add support for `fshl`/`fshr` in `isKnownToBeAPowerOfTwo`

If the funnel shifts are rotates (op0 == op1) then the number of 1s/0s
don't change so we can just look through op0/op1.

Proofs: https://alive2.llvm.org/ce/z/Pja5yu

Differential Revision: https://reviews.llvm.org/D157307

Added: 
    

Modified: 
    llvm/lib/Analysis/ValueTracking.cpp
    llvm/test/Analysis/ValueTracking/known-power-of-two.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 495fb5344cc2f2..f40894619e7697 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -2137,6 +2137,12 @@ bool isKnownToBeAPowerOfTwo(const Value *V, bool OrZero, unsigned Depth,
       case Intrinsic::bitreverse:
       case Intrinsic::bswap:
         return isKnownToBeAPowerOfTwo(II->getArgOperand(0), OrZero, Depth, Q);
+      case Intrinsic::fshr:
+      case Intrinsic::fshl:
+        // If Op0 == Op1, this is a rotate. is_pow2(rotate(x, y)) == is_pow2(x)
+        if (II->getArgOperand(0) == II->getArgOperand(1))
+          return isKnownToBeAPowerOfTwo(II->getArgOperand(0), OrZero, Depth, Q);
+        break;
       default:
         break;
       }

diff  --git a/llvm/test/Analysis/ValueTracking/known-power-of-two.ll b/llvm/test/Analysis/ValueTracking/known-power-of-two.ll
index fe01bfdaf432b3..8966dad5875182 100644
--- a/llvm/test/Analysis/ValueTracking/known-power-of-two.ll
+++ b/llvm/test/Analysis/ValueTracking/known-power-of-two.ll
@@ -214,7 +214,8 @@ define i16 @fshl_is_pow2_or_zero(i16 %x, i16 %y, i16 %z) {
 ; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
 ; CHECK-NEXT:    [[XP2:%.*]] = shl i16 4, [[X]]
 ; CHECK-NEXT:    [[XX:%.*]] = call i16 @llvm.fshl.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
-; CHECK-NEXT:    [[R:%.*]] = urem i16 [[Y]], [[XX]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i16 [[XX]], -1
+; CHECK-NEXT:    [[R:%.*]] = and i16 [[TMP1]], [[Y]]
 ; CHECK-NEXT:    ret i16 [[R]]
 ;
   %xp2 = shl i16 4, %x
@@ -262,7 +263,7 @@ define i1 @fshl_is_pow2(i16 %x, i16 %y, i16 %z) {
 ; CHECK-NEXT:    [[XP2:%.*]] = shl nuw i16 1, [[X]]
 ; CHECK-NEXT:    [[XX:%.*]] = call i16 @llvm.fshl.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
 ; CHECK-NEXT:    [[AND:%.*]] = and i16 [[XX]], [[Y]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i16 [[AND]], 0
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %xp2 = shl i16 1, %x
@@ -295,7 +296,8 @@ define i16 @fshr_is_pow2_or_zero(i16 %x, i16 %y, i16 %z) {
 ; CHECK-SAME: (i16 [[X:%.*]], i16 [[Y:%.*]], i16 [[Z:%.*]]) {
 ; CHECK-NEXT:    [[XP2:%.*]] = shl i16 4, [[X]]
 ; CHECK-NEXT:    [[XX:%.*]] = call i16 @llvm.fshr.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
-; CHECK-NEXT:    [[R:%.*]] = urem i16 [[Y]], [[XX]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i16 [[XX]], -1
+; CHECK-NEXT:    [[R:%.*]] = and i16 [[TMP1]], [[Y]]
 ; CHECK-NEXT:    ret i16 [[R]]
 ;
   %xp2 = shl i16 4, %x
@@ -343,7 +345,7 @@ define i1 @fshr_is_pow2(i16 %x, i16 %y, i16 %z) {
 ; CHECK-NEXT:    [[XP2:%.*]] = shl nuw i16 1, [[X]]
 ; CHECK-NEXT:    [[XX:%.*]] = call i16 @llvm.fshr.i16(i16 [[XP2]], i16 [[XP2]], i16 [[Z]])
 ; CHECK-NEXT:    [[AND:%.*]] = and i16 [[XX]], [[Y]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i16 [[AND]], [[XX]]
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i16 [[AND]], 0
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %xp2 = shl i16 1, %x