[PATCH] D155592: [AArch64] Reuse larger DUPLANE if available

JinGu Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 19 08:47:43 PDT 2023


jaykang10 added a comment.

In D155592#4514888 <https://reviews.llvm.org/D155592#4514888>, @dmgreen wrote:

> Could we add a PatFrags that looks something like this:
>
>   def dup_v8i16 : PatFrags<(ops node:$LHS, node:$RHS),
>                            [(v4i16 (extract_subvector (v8i16 (AArch64duplane16 (v8i16 node:$LHS), node:$RHS)), (i64 0))),
>                             (v4i16 (AArch64duplane16 (v8i16 node:$LHS), node:$RHS))]>;
>
> So that it matches either a v4i16 DUPLANE, or a subvector_extract of a v8i16 DUPLANE. Maybe call it something like AArch64duplanev416, I'm not sure. It could then be used in the existing `set` patterns for all the lane instructions. I think many of them might hit the same problems we see in the tests, but don't happen to have tests for every instruction.
>
>   [(set (v4i32 V128:$Rd),
>       (OpNode (v4i16 V64:$Rn),
>               (dup_v8i16 (v8i16 V128_lo:$Rm), VectorIndexH:$idx)))]> {

Yep, I agree with you. If possible, I did not want to touch existing patterns because it could cause other regressions.
Let me update the patterns with `Patfrags`.


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