[PATCH] D155502: [RISCV] Do not use FPR registers for fastcc if zfh/f/d is not specified in the architecture

[Yueh-Ting (eop) Chen via Phabricator via llvm-commits]

eopXD updated this revision to Diff 541379.
eopXD marked an inline comment as done.
eopXD added a comment.

Fix if-condition, use GPR register when there zhinx/zfinx/zdinx is available.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155502/new/

https://reviews.llvm.org/D155502

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll

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