[llvm] 11b9865 - [RISCV] Simplify glue handling logic in performCombineVMergeAndVOps [nfc]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2023-07-13T08:41:33-07:00
New Revision: 11b986522c09521b8e2f65765bfbefb43769d665

URL: https://github.com/llvm/llvm-project/commit/11b986522c09521b8e2f65765bfbefb43769d665
DIFF: https://github.com/llvm/llvm-project/commit/11b986522c09521b8e2f65765bfbefb43769d665.diff

LOG: [RISCV] Simplify glue handling logic in performCombineVMergeAndVOps [nfc]

This is a subset of Luke's D155063.  I'm splitting pieces and landing them in the process of convincing myself all the individual transforms are in fact correct.

In this case, we're simplifying based on the assumption that all of our vmerge operands have mask operands.  This is a fundemental property of a vmerge.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index bee85ab4d93a2a..e8e22352670ffc 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3209,6 +3209,10 @@ bool RISCVDAGToDAGISel::performCombineVMergeAndVOps(SDNode *N) {
   SDValue True = N->getOperand(2);
   SDValue Mask = N->getOperand(3);
   SDValue VL = N->getOperand(4);
+  // We always have a glue node for the mask at v0
+  assert(cast<RegisterSDNode>(Mask)->getReg() == RISCV::V0);
+  SDValue Glue = N->getOperand(N->getNumOperands() - 1);
+  assert(Glue.getValueType() == MVT::Glue);
 
   // We require that either merge and false are the same, or that merge
   // is undefined.
@@ -3289,8 +3293,7 @@ bool RISCVDAGToDAGISel::performCombineVMergeAndVOps(SDNode *N) {
     LoopWorklist.push_back(False.getNode());
     LoopWorklist.push_back(Mask.getNode());
     LoopWorklist.push_back(VL.getNode());
-    if (SDNode *Glued = N->getGluedNode())
-      LoopWorklist.push_back(Glued);
+    LoopWorklist.push_back(Glue.getNode());
     if (SDNode::hasPredecessorHelper(True.getNode(), Visited, LoopWorklist))
       return false;
   }
@@ -3361,8 +3364,8 @@ bool RISCVDAGToDAGISel::performCombineVMergeAndVOps(SDNode *N) {
     if (HasChainOp)
       Ops.push_back(True.getOperand(TrueChainOpIdx));
 
-    if (N->getGluedNode())
-      Ops.push_back(N->getOperand(N->getNumOperands() - 1));
+    // Add the glue for the CopyToReg of mask->v0.
+    Ops.push_back(Glue);
   }
 
   SDNode *Result =