[PATCH] D154756: [AArch64] Add scheduling model for Neoverse V1

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td:29
+
+  list<Predicate> UnsupportedFeatures = !listconcat(SMEUnsupported.F, [HasMTE]);
+}
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evandro wrote:
> dmgreen wrote:
> > Does it help to add SVE2 too?
> The Neoverse V1 does not support Armv9.
Yep, that's my point (If I understand what you are saying). It doesn't have SVE2, only SVE1. And doesn't have SME and MTE too. Hence adding it to the list of unsupported features could help cut down on the number of unsupported instructions that it thinks are missing.


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Comment at: llvm/test/tools/llvm-mca/AArch64/Neoverse/512tvb-sve-instructions.s:4
 
 # Check the Neoverse N2 model is used.
 
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evandro wrote:
> tschuett wrote:
> > Nit: V1 model?
> Perhaps it deserves a more comprehensive test case than just a single instruction.
Sounds like the comment still needs updating.


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Comment at: llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s:22
+addp v0.8b, v0.8b, v0.8b
+and v0.8b, v0.8b, v0.8b
+bic v0.4h, #15, lsl #8
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evandro wrote:
> dmgreen wrote:
> > The Neoverse-V2 version of this file has some extra instructions like addv's, aes and some dup instructions, among others.
> It has many more instructions, but SVE2 ones.  I'll add more coverage here.
Thanks - And what about the extra Neon instructions?


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  https://reviews.llvm.org/D154756/new/

https://reviews.llvm.org/D154756