[PATCH] D154858: [WIP] [AMDGPU] Add llvm.amdgcn.wave.reduce.umin/umax Intrinsic.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:4089
+        ScanStratgyImm == 0 ? ScanOptions::DPP : ScanOptions::Iterative;
+    if (ScanStrategy == ScanOptions::Iterative) {
+      // To reduce the VGPR, we need to iterative over all the active lanes.
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arsenm wrote:
> I was envisioning this as just a hint, and if unimplemented (or the target doesn't support the version), it would just fallback to one that works.
> 
> Should also add some intrinsic documentation to AMDGPUUsage with the values for this
Also split the argument to strategy decision to a separate function 


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D154858/new/

https://reviews.llvm.org/D154858