[PATCH] D153632: [AArch64] Extra tablegen patterns for smaller extracted addl/addw/subl/subw

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: jaykang10, biplmish, labrinea, chill.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
dmgreen requested review of this revision.
Herald added a project: LLVM.

During lowering, especially of smaller vector types, we can end up with `add (extract_subvector(zext(x), extract_subvector(zext(y))`, which can be turned into `extract_subvector(add(zext(y), zext(x)))`, which can use the `addl` AArch64 instruction. This adds some tablegen patterns for it, along with addw where only one operand is an extract/extend and subl/subw.


https://reviews.llvm.org/D153632

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/aarch64-load-ext.ll
  llvm/test/CodeGen/AArch64/arm64-ld1.ll
  llvm/test/CodeGen/AArch64/neon-extadd-extract.ll
  llvm/test/CodeGen/AArch64/neon-extadd.ll
  llvm/test/CodeGen/AArch64/uadd_sat_vec.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D153632.533949.patch
Type: text/x-patch
Size: 18230 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230623/d7e38e91/attachment.bin>