[PATCH] D146554: [BOLT][RISCV] Implement R_RISCV_ADD32/SUB32

[Job Noorman via Phabricator via llvm-commits]

jobnoorman updated this revision to Diff 532825.
jobnoorman edited the summary of this revision.
jobnoorman added a comment.
Herald added subscribers: wangpc, luke, frasercrmck, apazos, jocewei, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, MaskRay, jrtc27, niosHD, sabuasal, johnrusso, rbar.

Add tests.

Note that the `reloc-jt.s` test is a real-world use case for label subtraction
on RISC-V (jump tables). However, I haven't found a way to implement this test
without having to hardcode the label difference. I have tried to minimize the
fragility of this test by hardcoding the section addresses but ideas to improve
this test would be appreciated.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146554/new/

https://reviews.llvm.org/D146554

Files:
  bolt/lib/Core/Relocation.cpp
  bolt/lib/Rewrite/RewriteInstance.cpp
  bolt/test/RISCV/reloc-jt.s
  bolt/test/RISCV/reloc-label-diff.s

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