[PATCH] D152380: [RISCV] Canonicalize towards vmerge w/passthrough representation
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 13 14:03:47 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:3220
+ return V.isMachineOpcode() &&
+ V.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF;
+}
----------------
Is this clang-format correctly? I would think V.getMachineOpcode() should start at the same column as `V.isMachineOpcode()`
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D152380/new/
https://reviews.llvm.org/D152380
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