[PATCH] D129818: AMDGPU: Make default AMDHSA Code Object Version to be 5

[Changpeng Fang via Phabricator via llvm-commits]

cfang updated this revision to Diff 530681.
cfang marked 3 inline comments as done.
cfang added a comment.
Herald added subscribers: ormris, okura, kuter, arphaman, steven_wu, emaste, qcolombet.

Rebase and fixes LIT tests.

Is there any concerns to merge this patch to upstream?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129818/new/

https://reviews.llvm.org/D129818

Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/test/CodeGenCUDA/amdgpu-code-object-version.cu
  clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
  clang/test/CodeGenHIP/default-attributes.hip
  clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
  clang/test/CodeGenOpenCL/builtins-amdgcn.cl
  clang/test/Driver/hip-device-libs.hip
  lld/test/ELF/emulation-amdgpu.s
  lld/test/ELF/lto/amdgcn-oses.ll
  llvm/docs/AMDGPUUsage.rst
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
  llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
  llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
  llvm/test/CodeGen/AMDGPU/addrspacecast.gfx6.ll
  llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
  llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
  llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
  llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
  llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
  llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
  llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
  llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
  llvm/test/CodeGen/AMDGPU/cc-update.ll
  llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
  llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
  llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
  llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
  llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
  llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
  llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
  llvm/test/CodeGen/AMDGPU/ds_read2.ll
  llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
  llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
  llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
  llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
  llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
  llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
  llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
  llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
  llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
  llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
  llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
  llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
  llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
  llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
  llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
  llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
  llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
  llvm/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
  llvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll
  llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
  llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
  llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
  llvm/test/CodeGen/AMDGPU/spill-m0.ll
  llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
  llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
  llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
  llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
  llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
  llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
  llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
  llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
  llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
  llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
  llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
  llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
  llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
  llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
  llvm/test/CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
  llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll