[PATCH] D152421: [RISCV] Introduce the concept of DLEN(data path width) into getLMULCost.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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SiFive's x280 CPU has a vector unit that VLEN/2 bits wide. This
means that LMUL=1 operations take 2 to process all VLEN bits.

This patch adds a DLenFactor tuning parameter and applies it to
TuneSiFive7. getLMULCost has been updated to use this factor in
its calculations. I've added an x280 command line to one cost
model test to demonstrate the effect.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D152421

Files:
  llvm/lib/Target/RISCV/RISCVFeatures.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/RISCV/arith-int.ll

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