[PATCH] D152236: [RISCV] Add special case to selectImm for constants that can be created with (ADD (SLLI C, 32), C).

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: reames, jrtc27, asb, luismarques.
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Where C is a simm32.

This costs an extra temporary register, but avoids a constant pool.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D152236

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/bswap-bitreverse.ll
  llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
  llvm/test/CodeGen/RISCV/div-by-constant.ll
  llvm/test/CodeGen/RISCV/div.ll
  llvm/test/CodeGen/RISCV/pr56457.ll
  llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
  llvm/test/CodeGen/RISCV/rv64zbb.ll
  llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
  llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
  llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
  llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
  llvm/test/CodeGen/RISCV/sextw-removal.ll
  llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
  llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
  llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll

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