[PATCH] D152223: [RISCV]Fold xor(setcc x, y, cond), 1 --> setcc (x, y, inverted(cond))

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:10328
+          CC == ISD::SETOEQ))
+      return DAG.getSetCC(DL, VT, N00, N01, ISD::getSetCCInverse(CC, VT));
   }
----------------
getSetCCInverse expects the VT of the setcc operands not the VT of the result. This is needed to tell the difference between floating point and integer comparisons.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D152223/new/

https://reviews.llvm.org/D152223