[llvm] 4374026 - [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)

Sergei Barannikov via llvm-commits llvm-commits at lists.llvm.org
Wed May 24 20:33:53 PDT 2023


Author: Sergei Barannikov
Date: 2023-05-25T06:33:41+03:00
New Revision: 4374026d6da23dbb6b9c2e4fca65cdf198ee1e0f

URL: https://github.com/llvm/llvm-project/commit/4374026d6da23dbb6b9c2e4fca65cdf198ee1e0f
DIFF: https://github.com/llvm/llvm-project/commit/4374026d6da23dbb6b9c2e4fca65cdf198ee1e0f.diff

LOG: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)

D151036 adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D151288

Added: 
    

Modified: 
    llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index fa6ddf5007b06..f259da4df2e5b 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -3087,6 +3087,7 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
         MipsMCExpr::create(MipsMCExpr::MEK_HIGHER, SymExpr, getContext());
 
     bool RdRegIsRsReg =
+        UseSrcReg &&
         getContext().getRegisterInfo()->isSuperOrSubRegisterEq(DstReg, SrcReg);
 
     if (canUseATReg() && UseSrcReg && RdRegIsRsReg) {


        


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