[PATCH] D151340: AMDGPU: Refine undef handling for llvm.amdgcn.class intrinsic

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 24 08:29:57 PDT 2023


arsenm created this revision.
arsenm added reviewers: AMDGPU, foad, rampitec.
Herald added subscribers: nlopes, StephenFan, kerbowa, hiraditya, tpr, dstuttard, yaxunl, jvesely, kzhuravl.
Herald added a project: All.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

This barely matters since 99% are converted to the generic intrinsic now,
and the only real difference is the target intrinsic supports a variable
test mask. Start propagating poison. Prefer folding to a defined result (false)
for an undef test mask. Propagate undef for the first operand.


https://reviews.llvm.org/D151340

Files:
  llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
  llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll


Index: llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
===================================================================
--- llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -569,14 +569,16 @@
 
 define i1 @test_class_poison_poison_f32(float %x) nounwind {
 ; CHECK-LABEL: @test_class_poison_poison_f32(
-; CHECK-NEXT:    ret i1 undef
+; CHECK-NEXT:    [[VAL:%.*]] = call i1 @llvm.amdgcn.class.f32(float poison, i32 poison)
+; CHECK-NEXT:    ret i1 poison
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float poison, i32 poison)
   ret i1 %val
 }
 define i1 @test_class_val_poison_f32(float %arg) nounwind {
 ; CHECK-LABEL: @test_class_val_poison_f32(
-; CHECK-NEXT:    ret i1 false
+; CHECK-NEXT:    [[VAL:%.*]] = call i1 @llvm.amdgcn.class.f32(float [[ARG:%.*]], i32 poison)
+; CHECK-NEXT:    ret i1 poison
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float %arg, i32 poison)
   ret i1 %val
@@ -584,7 +586,8 @@
 
 define i1 @test_class_poison_val_f32(i32 %arg) nounwind {
 ; CHECK-LABEL: @test_class_poison_val_f32(
-; CHECK-NEXT:    ret i1 undef
+; CHECK-NEXT:    [[VAL:%.*]] = call i1 @llvm.amdgcn.class.f32(float poison, i32 [[ARG:%.*]])
+; CHECK-NEXT:    ret i1 poison
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float poison, i32 %arg)
   ret i1 %val
@@ -649,7 +652,7 @@
 
 define i1 @test_class_undef_undef_f32() nounwind {
 ; CHECK-LABEL: @test_class_undef_undef_f32(
-; CHECK-NEXT:    ret i1 undef
+; CHECK-NEXT:    ret i1 false
 ;
   %val = call i1 @llvm.amdgcn.class.f32(float undef, i32 undef)
   ret i1 %val
Index: llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -460,14 +460,17 @@
       return ⅈ
     }
 
-    // FIXME: Should propagate poison.
-    if (isa<UndefValue>(Src0))
-      return IC.replaceInstUsesWith(II, UndefValue::get(II.getType()));
+    // Propagate poison.
+    if (isa<PoisonValue>(Src0) || isa<PoisonValue>(Src1))
+      return PoisonValue::get(ReturnType);
 
-    if (isa<UndefValue>(Src1)) {
+    // llvm.amdgcn.class(_, undef) -> false
+    if (Q.isUndefValue(Src1))
       return IC.replaceInstUsesWith(II, ConstantInt::get(II.getType(), false));
-    }
 
+    // llvm.amdgcn.class(undef, _) -> undef
+    if (Q.isUndefValue(Src0))
+      return UndefValue::get(ReturnType);
     break;
   }
   case Intrinsic::amdgcn_cvt_pkrtz: {


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D151340.525193.patch
Type: text/x-patch
Size: 2559 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230524/2b43dab5/attachment-0001.bin>


More information about the llvm-commits mailing list