[PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements

Sat May 20 13:50:50 PDT 2023

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clang-format

The lists contain differences between register numbers, not the register
numbers themselves. Since a difference can also be negative, this also
changes its type to signed.

Changing the type to signed exposed a "bug". For AMDGPU, which has many
registers, the first element of a sequence could be as big as ~45k.
The value does not fit into int16_t, but fits into uint16_t. The bug
didn't show up because of unsigned wrapping and truncation of the Val
field in the advance() method.

To fix the issue, I changed the way regunit difflists are encoded. The
4-bit 'scale' field of MCRegisterDesc::RegUnit was replaced by 12-bit
number of the first regunit, and the first element of each of the lists
was removed. The higher 20 bits of RegUnit field contain the initial
offset into DiffLists array.
AMDGPU has 1'409 regunits (2^12 = 4'096), and the biggest offset is
80'041 (2^20 = 1'048'576). That is, there is enough room.

Changing the encoding method also resulted in a smaller array size, the
numbers are below (I omitted targets with less than 100 elements).

  AMDGPU   | 80052 | 78741 |  -1,6%
  RISCV    |  6498 |  6297 |  -3,1%
  ARM      |  4181 |  3966 |  -5,1%
  AArch64  |  2770 |  2592 |  -6,4%
  PPC      |  1578 |  1441 |  -8,7%
  Hexagon  |   994 |   740 | -25,6%
  R600     |   508 |   398 | -21,7%
  VE       |   471 |   459 |  -2,5%
  Sparc    |   381 |   363 |  -4,7%
  X86      |   326 |   208 | -36,2%
  Mips     |   253 |   200 | -20,9%
  SystemZ  |   186 |   162 | -12,9%

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151036

Files:
  llvm/include/llvm/MC/MCRegisterInfo.h
  llvm/utils/TableGen/RegisterInfoEmitter.cpp

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