[llvm] ca340a3 - [RISCV] Pre-commit test case from PR62734. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-05-16T16:07:23-07:00
New Revision: ca340a3fc503db2fbb651b75fc980d0a89f4540a

URL: https://github.com/llvm/llvm-project/commit/ca340a3fc503db2fbb651b75fc980d0a89f4540a
DIFF: https://github.com/llvm/llvm-project/commit/ca340a3fc503db2fbb651b75fc980d0a89f4540a.diff

LOG: [RISCV] Pre-commit test case from PR62734. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/split-offsets.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/split-offsets.ll b/llvm/test/CodeGen/RISCV/split-offsets.ll
index e597bd1bfe80..2ec3a5e464b8 100644
--- a/llvm/test/CodeGen/RISCV/split-offsets.ll
+++ b/llvm/test/CodeGen/RISCV/split-offsets.ll
@@ -151,3 +151,37 @@ entry:
   store i32 3, ptr %1, align 4
   ret void
 }
+
+; Test from PR62734.
+define void @test4(ptr %dest) {
+; RV32I-LABEL: test4:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    addi a0, a0, 2047
+; RV32I-NEXT:    addi a1, a0, 1
+; RV32I-NEXT:    li a2, 1
+; RV32I-NEXT:    sb a2, 1(a0)
+; RV32I-NEXT:    sb a2, 1(a1)
+; RV32I-NEXT:    sb a2, 2(a1)
+; RV32I-NEXT:    sb a2, 3(a1)
+; RV32I-NEXT:    ret
+;
+; RV64I-LABEL: test4:
+; RV64I:       # %bb.0:
+; RV64I-NEXT:    addi a0, a0, 2047
+; RV64I-NEXT:    addi a1, a0, 1
+; RV64I-NEXT:    li a2, 1
+; RV64I-NEXT:    sb a2, 1(a0)
+; RV64I-NEXT:    sb a2, 1(a1)
+; RV64I-NEXT:    sb a2, 2(a1)
+; RV64I-NEXT:    sb a2, 3(a1)
+; RV64I-NEXT:    ret
+  %p1 = getelementptr i8, ptr %dest, i32 2048
+  store i8 1, ptr %p1
+  %p2 = getelementptr i8, ptr %dest, i32 2049
+  store i8 1, ptr %p2
+  %p3 = getelementptr i8, ptr %dest, i32 2050
+  store i8 1, ptr %p3
+  %p4 = getelementptr i8, ptr %dest, i32 2051
+  store i8 1, ptr %p4
+  ret void
+}