[PATCH] D107278: [RISCV] Add new lga pseudoinstruction

Mon May 15 22:07:04 PDT 2023

MaskRay accepted this revision.
MaskRay added a comment.
This revision is now accepted and ready to land.

LGTM. I have traced through the control flow.

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Comment at: llvm/test/MC/RISCV/rvi-pseudos.s:48
+# CHECK:      .Lpcrel_hi7:
+# CHECK:      auipc a1, %got_pcrel_hi(another_symbol)
+# CHECK-RV32: lw    a1, %pcrel_lo(.Lpcrel_hi7)(a1)
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Add `-NEXT` for both `auipc` and `lw`/`ld`. It gives the user a hint that the instructions are contiguous. Also, in case of an failure, the FileCheck diagnostic will be more useful. 

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107278/new/

https://reviews.llvm.org/D107278