[PATCH] D143898: [CodeGenPrepare] Relax conditions for folding addressing mode into loads/stores

[Momchil Velikov via Phabricator via llvm-commits]

chill added inline comments.


================
Comment at: llvm/include/llvm/CodeGen/TargetLowering.h:3178
+                                       const AddrMode &AM) const {
+    return AM.HasBaseReg && AM.BaseGV == nullptr && AM.Scale == 0 && AM.BaseOffs == 0;
+  }
----------------
efriedma wrote:
> In this case, the addressing mode doesn't actually represent any computation, so it isn't relevant for this transform; when do you expect it to become relevant?
The logic of the `AddressingModeMatcher` is that it accumulates an addressing mode from partial "expressions". For example an addressing mode
which ends up as `[reg + imm]` or `[reg + reg]` would have involved checks for legality of just `[reg]`  here:
https://github.com/llvm/llvm-project/blob/ddfb974d0fca62e3eaeb98b79b5e29738c9082d2/llvm/lib/CodeGen/CodeGenPrepare.cpp#L4926


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  https://reviews.llvm.org/D143898/new/

https://reviews.llvm.org/D143898