[PATCH] D146737: [AMDGPU] Trim zero components from buffer and image stores

[Mateja Marjanovic via Phabricator via llvm-commits]

matejam updated this revision to Diff 520986.
matejam added a comment.

Use Intrinsic opcode to know if the instructions has DMask instead of testing if the instruction has a ConstantInt as the second operand.
Add more run-lines to the test.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146737/new/

https://reviews.llvm.org/D146737

Files:
  llvm/include/llvm/IR/IntrinsicsAMDGPU.td
  llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
  llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
  llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-simplify-image-buffer-stores.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D146737.520986.patch
Type: text/x-patch
Size: 26475 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230510/e934c13d/attachment.bin>