[PATCH] D149743: [RISCV][CodeGen] Support Zdinx on RV32 codegen

Shao-Ce SUN via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 3 06:24:27 PDT 2023


sunshaoce added a comment.

In D122918 <https://reviews.llvm.org/D122918>, @jrct27 said

> I don't know why you've marked this as done; the line in question (which is now the line below) is not correct, the immediate could be 0x7f[cdef] at which point the arithmetic here will wrap to 0x80[0123] (which the machine verifier probably catches as out of range due to the immediate being signed?..). That is:
>
>   void
>   foo(void *p, double d)
>   {
>       *(double *)((char *)p + 0x7fc) = d;
>   }
>
> will be miscompiled, surely.

I tested it now. It seems that the bug has already been fixed.

  $ bin/clang -cc1 -triple riscv32 -target-feature +zdinx -S test.c -O3 
  
  foo:                                    # @foo
  .Lfoo$local:
  	.type	.Lfoo$local, at function
  # %bb.0:                                # %entry
  	addi	a3, a0, 2044
  	sw	a1, 2044(a0)
  	sw	a2, 4(a3)
  	ret



  $ bin/clang -cc1 -triple riscv32 -S test.c -O3
  
  foo:                                    # @foo
  .Lfoo$local:
  	.type	.Lfoo$local, at function
  # %bb.0:                                # %entry
  	addi	a3, a0, 2044
  	sw	a1, 2044(a0)
  	sw	a2, 4(a3)
  	ret



  $ bin/clang -cc1 -triple riscv32 -target-feature +d -S test.c -O3
  
  foo:                                    # @foo
  .Lfoo$local:
  	.type	.Lfoo$local, at function
  # %bb.0:                                # %entry
  	fsd	fa0, 2044(a0)
  	ret

Any suggestions?@jrtc27


Repository:
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  https://reviews.llvm.org/D149743/new/

https://reviews.llvm.org/D149743



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