[PATCH] D149166: [RISCV] Try to perform select => binop combines when conditional operations are available

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I had wondered if it made sense to handle Zicond/XventanaCondOps in LowerSelect by creating RISCV::CZERO_EQZ/CZERO_NEZ opcodes. Would cut down on the number of isel patterns.


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  https://reviews.llvm.org/D149166/new/

https://reviews.llvm.org/D149166