[PATCH] D148874: [RISCV][CodeGen] Support Zfinx codegen

Shao-Ce SUN via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 24 03:46:41 PDT 2023


sunshaoce added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoF.td:579-580
 def : Pat<(riscv_fmv_x_anyextw_rv64 FPR32:$src), (FMV_X_W FPR32:$src)>;
-def : Pat<(sext_inreg (riscv_fmv_x_anyextw_rv64 FPR32:$src), i32),
-          (FMV_X_W FPR32:$src)>;
 
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`def : Pat<(sext_inreg (riscv_fmv_x_anyextw_rv64 FPR32:$src), i32), (FMV_X_W FPR32:$src)>;`
It seems to not work, and deleting it has no effect on the tests.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoF.td:734
+def : Pat<(riscv_fmv_x_anyextw_rv64 GPRF32:$src), (COPY GPRF32:$src)>;
+def : Pat<(sext_inreg (riscv_fmv_x_anyextw_rv64 GPRF32:$src), i32),
+          (COPY GPRF32:$src)>;
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craig.topper wrote:
> This pattern doesn't look right. A copy would not guarantee sign extension.
`def : Pat<(sext_inreg (riscv_fmv_x_anyextw_rv64 GPRF32:$src), i32), (COPY GPRF32:$src)>;` After deletion, it will generate the `sext.w a0, a0` instruction in the `bcvt_f32_to_sext_i32` test.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D148874/new/

https://reviews.llvm.org/D148874



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