[PATCH] D149012: [InstSimplify] Test case for D149001

[Zhu Siyuan via Phabricator via llvm-commits]

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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D149012

Files:
  llvm/test/Transforms/InstSimplify/div.ll


Index: llvm/test/Transforms/InstSimplify/div.ll
===================================================================
--- llvm/test/Transforms/InstSimplify/div.ll
+++ llvm/test/Transforms/InstSimplify/div.ll
@@ -434,3 +434,84 @@
 }
 
 !0 = !{i32 0, i32 3}
+
+define i32 @sdiv_one_srem_divisor(i32 %a, i32 %b) {
+; CHECK-LABEL: @sdiv_one_srem_divisor(
+; CHECK-NEXT:    ret i32 [[O:%.*]]
+;
+  %srem = srem i32 1, %b
+  %sdiv = sdiv i32 %a, %srem
+  ret i32 %sdiv
+}
+
+define i32 @sdiv_one_urem_divisor(i32 %a, i32 %b) {
+; CHECK-LABEL: @sdiv_one_urem_divisor(
+; CHECK-NEXT:    ret i32 [[O:%.*]]
+;
+  %urem = urem i32 1, %b
+  %sdiv = sdiv i32 %a, %urem
+  ret i32 %sdiv
+}
+
+define i32 @udiv_one_srem_divisor(i32 %a, i32 %b) {
+; CHECK-LABEL: @udiv_one_srem_divisor(
+; CHECK-NEXT:    ret i32 [[O:%.*]]
+;
+  %srem = srem i32 1, %b
+  %udiv = udiv i32 %a, %srem
+  ret i32 %udiv
+}
+
+define i32 @udiv_one_urem_divisor(i32 %a, i32 %b) {
+; CHECK-LABEL: @udiv_one_urem_divisor(
+; CHECK-NEXT:    ret i32 [[O:%.*]]
+;
+  %urem = urem i32 1, %b
+  %udiv = udiv i32 %a, %urem
+  ret i32 %udiv
+}
+
+define i32 @srem_one_srem_divisor(i32 %a, i32 %b) {
+; CHECK-LABEL: @srem_one_srem_divisor(
+; CHECK-NEXT:    ret i32 0
+;
+  %srem = srem i32 1, %b
+  %srem1 = srem i32 %a, %srem
+  ret i32 %srem1
+}
+
+define i32 @urem_one_srem_divisor(i32 %a, i32 %b) {
+; CHECK-LABEL: @urem_one_srem_divisor(
+; CHECK-NEXT:    ret i32 0
+;
+  %srem = srem i32 1, %b
+  %urem = urem i32 %a, %srem
+  ret i32 %urem
+}
+
+define i32 @srem_one_urem_divisor(i32 %a, i32 %b) {
+; CHECK-LABEL: @srem_one_urem_divisor(
+; CHECK-NEXT:    ret i32 0
+;
+  %urem = urem i32 1, %b
+  %srem = srem i32 %a, %urem
+  ret i32 %srem
+}
+
+define i32 @urem_one_urem_divisor(i32 %a, i32 %b) {
+; CHECK-LABEL: @urem_one_urem_divisor(
+; CHECK-NEXT:    ret i32 0
+;
+  %urem = urem i32 1, %b
+  %urem1 = urem i32 %a, %urem
+  ret i32 %urem1
+}
+
+define <2 x i8> @sdiv_one_vec_srem_divisor(<2 x i8> %a, <2 x i8> %b) {
+; CHECK-LABEL: @sdiv_one_vec_srem_divisor(
+; CHECK-NEXT:    ret <2 x i8> [[O:%.*]]
+;
+  %srem = srem <2 x i8> <i8 1, i8 1>, %b
+  %sdiv = sdiv <2 x i8> %a, %srem
+  ret <2 x i8> %sdiv
+}
\ No newline at end of file


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