[PATCH] D147763: [ARM] Align code to 4-byte boundary after .arm directive

Antonio Abbatangelo via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 6 22:30:52 PDT 2023


antangelo created this revision.
antangelo added reviewers: alanphipps, grosbach, MaskRay.
Herald added subscribers: hiraditya, kristof.beyls.
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Fixes #53386


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D147763

Files:
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/test/MC/ARM/directive-arch-mode-switch.s
  llvm/test/MC/ARM/misaligned-blx.s
  llvm/test/MC/ARM/thumb-function-address.s
  llvm/test/MC/ARM/thumb-types.s


Index: llvm/test/MC/ARM/thumb-types.s
===================================================================
--- llvm/test/MC/ARM/thumb-types.s
+++ llvm/test/MC/ARM/thumb-types.s
@@ -6,15 +6,15 @@
 @ CHECK-NEXT:   2: 00000000     0 NOTYPE  LOCAL  DEFAULT    2 $t.0
 @ CHECK-NEXT:   3: 00000002     0 OBJECT  LOCAL  DEFAULT    2 implicit_data
 @ CHECK-NEXT:   4: 00000002     0 NOTYPE  LOCAL  DEFAULT    2 $d.1
-@ CHECK-NEXT:   5: 00000006     0 FUNC    LOCAL  DEFAULT    2 arm_function
-@ CHECK-NEXT:   6: 00000006     0 NOTYPE  LOCAL  DEFAULT    2 $a.2
-@ CHECK-NEXT:   7: 0000000a     0 NOTYPE  LOCAL  DEFAULT    2 untyped_text_label
-@ CHECK-NEXT:   8: 0000000a     0 NOTYPE  LOCAL  DEFAULT    2 $t.3
-@ CHECK-NEXT:   9: 0000000d     0 FUNC    LOCAL  DEFAULT    2 explicit_function
-@ CHECK-NEXT:  10: 0000000e     0 NOTYPE  LOCAL  DEFAULT    2 $d.4
+@ CHECK-NEXT:   5: 00000008     0 FUNC    LOCAL  DEFAULT    2 arm_function
+@ CHECK-NEXT:   6: 00000008     0 NOTYPE  LOCAL  DEFAULT    2 $a.2
+@ CHECK-NEXT:   7: 0000000c     0 NOTYPE  LOCAL  DEFAULT    2 untyped_text_label
+@ CHECK-NEXT:   8: 0000000c     0 NOTYPE  LOCAL  DEFAULT    2 $t.3
+@ CHECK-NEXT:   9: 0000000f     0 FUNC    LOCAL  DEFAULT    2 explicit_function
+@ CHECK-NEXT:  10: 00000010     0 NOTYPE  LOCAL  DEFAULT    2 $d.4
 @ CHECK-NEXT:  11: 00000000     4 TLS     LOCAL  DEFAULT    5 tls
-@ CHECK-NEXT:  12: 00000013     0 IFUNC   LOCAL  DEFAULT    2 indirect_function
-@ CHECK-NEXT:  13: 00000012     0 NOTYPE  LOCAL  DEFAULT    2 $t.5
+@ CHECK-NEXT:  12: 00000015     0 IFUNC   LOCAL  DEFAULT    2 indirect_function
+@ CHECK-NEXT:  13: 00000014     0 NOTYPE  LOCAL  DEFAULT    2 $t.5
 @ CHECK-NEXT:  14: 00000000     0 NOTYPE  LOCAL  DEFAULT    4 untyped_data_label
 @ CHECK-NEXT:  15: 00000000     0 NOTYPE  LOCAL  DEFAULT    4 $t.6
 @ CHECK-NEXT:  16: 00000002     0 OBJECT  LOCAL  DEFAULT    4 explicit_data
Index: llvm/test/MC/ARM/thumb-function-address.s
===================================================================
--- llvm/test/MC/ARM/thumb-function-address.s
+++ llvm/test/MC/ARM/thumb-function-address.s
@@ -39,4 +39,4 @@
 @ CHECK-NEXT: 00000003 0 FUNC   LOCAL DEFAULT 2   foo_resolver
 @ CHECK-NEXT: 00000003 0 IFUNC  LOCAL DEFAULT 2   foo
 @ CHECK-NEXT: 00000004 0 FUNC   LOCAL DEFAULT 2   label
-@ CHECK-NEXT: 00000006 0 NOTYPE LOCAL DEFAULT 2   $a.1
+@ CHECK-NEXT: 00000008 0 NOTYPE LOCAL DEFAULT 2   $a.1
Index: llvm/test/MC/ARM/misaligned-blx.s
===================================================================
--- llvm/test/MC/ARM/misaligned-blx.s
+++ llvm/test/MC/ARM/misaligned-blx.s
@@ -8,6 +8,7 @@
 
         @ A misaligned ARM destination.
         .arm
+        .byte 0x0
         .globl _misaligned
 _misaligned:
         bx lr
Index: llvm/test/MC/ARM/directive-arch-mode-switch.s
===================================================================
--- llvm/test/MC/ARM/directive-arch-mode-switch.s
+++ llvm/test/MC/ARM/directive-arch-mode-switch.s
@@ -35,6 +35,7 @@
 @ Switch to ARM mode
   .arm
 @ CHECK: .code 32
+@ CHECK: .p2align 2
 
 @ In ARM mode, switch to a CPU which has ARM and Thumb, no warning or .code directive (stay in ARM mode)
   .cpu cortex-a8
Index: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===================================================================
--- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -11458,6 +11458,7 @@
   if (isThumb())
     SwitchMode();
   getParser().getStreamer().emitAssemblerFlag(MCAF_Code32);
+  getParser().getStreamer().emitCodeAlignment(Align(4), &getSTI(), 0);
   return false;
 }
 


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