[llvm] f45b22e - [ARM] Convert some tests to opaque pointers (NFC)

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 4 02:22:20 PDT 2023


Author: Nikita Popov
Date: 2023-04-04T11:22:08+02:00
New Revision: f45b22eeb58f15dc73089efad6ee109a2ed4b9f2

URL: https://github.com/llvm/llvm-project/commit/f45b22eeb58f15dc73089efad6ee109a2ed4b9f2
DIFF: https://github.com/llvm/llvm-project/commit/f45b22eeb58f15dc73089efad6ee109a2ed4b9f2.diff

LOG: [ARM] Convert some tests to opaque pointers (NFC)

Added: 
    

Modified: 
    llvm/test/CodeGen/ARM/combine-movc-sub.ll
    llvm/test/CodeGen/ARM/inlineasm-X-constraint.ll
    llvm/test/CodeGen/ARM/lsr-setupcost.ll
    llvm/test/CodeGen/ARM/shifter_operand.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/ARM/combine-movc-sub.ll b/llvm/test/CodeGen/ARM/combine-movc-sub.ll
index 685830c6172c..ca5d08944354 100644
--- a/llvm/test/CodeGen/ARM/combine-movc-sub.ll
+++ b/llvm/test/CodeGen/ARM/combine-movc-sub.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -opaque-pointers=0 %s -o - -verify-machineinstrs | FileCheck %s
+; RUN: llc %s -o - -verify-machineinstrs | FileCheck %s
 
 target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
 target triple = "thumbv7s-apple-unknown"
@@ -8,21 +8,21 @@ target triple = "thumbv7s-apple-unknown"
 ; inside the loop.  In this case, the kill flag on the subtract should be removed or else
 ; it will fail verification.
 
-%struct.PROOFSEARCH_HELP = type { %struct.LIST_HELP*, %struct.LIST_HELP*, %struct.LIST_HELP*, %struct.LIST_HELP*, %struct.SHARED_INDEX_NODE*, %struct.LIST_HELP*, %struct.SHARED_INDEX_NODE*, %struct.LIST_HELP*, %struct.SORTTHEORY_HELP*, %struct.SORTTHEORY_HELP*, %struct.SORTTHEORY_HELP*, %struct.SHARED_INDEX_NODE*, %struct.LIST_HELP*, i32*, i32*, %struct.LIST_HELP*, i32, i32, i32, i32, i32, i32, i32, i32 }
-%struct.SORTTHEORY_HELP = type { %struct.st*, [4000 x %struct.NODE_HELP*], %struct.LIST_HELP*, %struct.LIST_HELP*, i32 }
-%struct.st = type { %struct.subst*, %struct.LIST_HELP*, %struct.LIST_HELP*, i16, i16 }
-%struct.subst = type { %struct.subst*, i32, %struct.term* }
-%struct.term = type { i32, %union.anon, %struct.LIST_HELP*, i32, i32 }
-%union.anon = type { %struct.LIST_HELP* }
-%struct.NODE_HELP = type { %struct.LIST_HELP*, i32, i32, i32, %struct.LIST_HELP*, i32 }
-%struct.SHARED_INDEX_NODE = type { %struct.st*, [3001 x %struct.term*], [4000 x %struct.term*], i32 }
-%struct.LIST_HELP = type { %struct.LIST_HELP*, i8* }
-%struct.CLAUSE_HELP = type { i32, i32, i32, i32, i32*, i32, %struct.LIST_HELP*, %struct.LIST_HELP*, i32, i32, %struct.LITERAL_HELP**, i32, i32, i32, i32 }
-%struct.LITERAL_HELP = type { i32, i32, i32, %struct.CLAUSE_HELP*, %struct.term* }
+%struct.PROOFSEARCH_HELP = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32 }
+%struct.SORTTHEORY_HELP = type { ptr, [4000 x ptr], ptr, ptr, i32 }
+%struct.st = type { ptr, ptr, ptr, i16, i16 }
+%struct.subst = type { ptr, i32, ptr }
+%struct.term = type { i32, %union.anon, ptr, i32, i32 }
+%union.anon = type { ptr }
+%struct.NODE_HELP = type { ptr, i32, i32, i32, ptr, i32 }
+%struct.SHARED_INDEX_NODE = type { ptr, [3001 x ptr], [4000 x ptr], i32 }
+%struct.LIST_HELP = type { ptr, ptr }
+%struct.CLAUSE_HELP = type { i32, i32, i32, i32, ptr, i32, ptr, ptr, i32, i32, ptr, i32, i32, i32, i32 }
+%struct.LITERAL_HELP = type { i32, i32, i32, ptr, ptr }
 
-declare void @foo(%struct.PROOFSEARCH_HELP*, %struct.CLAUSE_HELP*)
+declare void @foo(ptr, ptr)
 
-define hidden fastcc %struct.LIST_HELP* @test(%struct.PROOFSEARCH_HELP* %Search, %struct.LIST_HELP* %ClauseList, i32 %Level, %struct.LIST_HELP** nocapture %New) {
+define hidden fastcc ptr @test(ptr %Search, ptr %ClauseList, i32 %Level, ptr nocapture %New) {
 ; CHECK-LABEL: test:
 ; CHECK:       @ %bb.0: @ %entry
 ; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, lr}
@@ -67,28 +67,27 @@ entry:
   br label %for.body
 
 for.body:                                         ; preds = %for.inc, %entry
-  %Scan.038 = phi %struct.LIST_HELP* [ %ClauseList, %entry ], [ %i9, %for.inc ]
-  %car.i33 = getelementptr inbounds %struct.LIST_HELP, %struct.LIST_HELP* %Scan.038, i32 0, i32 1
-  %i5 = bitcast i8** %car.i33 to %struct.CLAUSE_HELP**
-  %i6 = load %struct.CLAUSE_HELP*, %struct.CLAUSE_HELP** %i5, align 4
+  %Scan.038 = phi ptr [ %ClauseList, %entry ], [ %i9, %for.inc ]
+  %car.i33 = getelementptr inbounds %struct.LIST_HELP, ptr %Scan.038, i32 0, i32 1
+  %i6 = load ptr, ptr %car.i33, align 4
   %. = add i32 %i4, 10
   %.Level = select i1 %cmp4.i.i, i32 %i3, i32 %Level
-  %splitfield.i = getelementptr inbounds %struct.CLAUSE_HELP, %struct.CLAUSE_HELP* %i6, i32 0, i32 4
-  %i7 = load i32*, i32** %splitfield.i, align 4
-  %arrayidx.i = getelementptr inbounds i32, i32* %i7, i32 %.
-  %i8 = load i32, i32* %arrayidx.i, align 4
+  %splitfield.i = getelementptr inbounds %struct.CLAUSE_HELP, ptr %i6, i32 0, i32 4
+  %i7 = load ptr, ptr %splitfield.i, align 4
+  %arrayidx.i = getelementptr inbounds i32, ptr %i7, i32 %.
+  %i8 = load i32, ptr %arrayidx.i, align 4
   %shl.i = shl i32 1, %.Level
   %and.i = and i32 %i8, %shl.i
   %cmp4.i = icmp eq i32 %and.i, 0
   br i1 %cmp4.i, label %for.inc, label %if.then
 
 if.then:                                          ; preds = %for.body
-  tail call void @foo(%struct.PROOFSEARCH_HELP* %Search, %struct.CLAUSE_HELP* %i6)
-  store i8* null, i8** %car.i33, align 4
+  tail call void @foo(ptr %Search, ptr %i6)
+  store ptr null, ptr %car.i33, align 4
   br label %for.inc
 
 for.inc:                                          ; preds = %if.then, %for.body
-  %cdr.i = getelementptr inbounds %struct.LIST_HELP, %struct.LIST_HELP* %Scan.038, i32 0, i32 0
-  %i9 = load %struct.LIST_HELP*, %struct.LIST_HELP** %cdr.i, align 4
+  %cdr.i = getelementptr inbounds %struct.LIST_HELP, ptr %Scan.038, i32 0, i32 0
+  %i9 = load ptr, ptr %cdr.i, align 4
   br label %for.body
 }

diff  --git a/llvm/test/CodeGen/ARM/inlineasm-X-constraint.ll b/llvm/test/CodeGen/ARM/inlineasm-X-constraint.ll
index 08781d3ef150..66f1dd59d3a1 100644
--- a/llvm/test/CodeGen/ARM/inlineasm-X-constraint.ll
+++ b/llvm/test/CodeGen/ARM/inlineasm-X-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc -opaque-pointers=0 -mtriple=armv7-none-eabi -mattr=+neon < %s -o - | FileCheck %s
+; RUN: llc -mtriple=armv7-none-eabi -mattr=+neon < %s -o - | FileCheck %s
 
 ; The following functions test the use case where an X constraint is used to
 ; add a dependency between an assembly instruction (vmsr in this case) and
@@ -18,9 +18,9 @@
 define arm_aapcs_vfpcc double @f1(double %f, i32 %pscr_value) {
 entry:
   %f.addr = alloca double, align 8
-  store double %f, double* %f.addr, align 8
-  call void asm sideeffect "vmsr fpscr,$1", "=*X,r"(double* elementtype(double) nonnull %f.addr, i32 %pscr_value) nounwind
-  %0 = load double, double* %f.addr, align 8
+  store double %f, ptr %f.addr, align 8
+  call void asm sideeffect "vmsr fpscr,$1", "=*X,r"(ptr elementtype(double) nonnull %f.addr, i32 %pscr_value) nounwind
+  %0 = load double, ptr %f.addr, align 8
   %add = fadd double %0, %0
   ret double %add
 }
@@ -36,9 +36,9 @@ entry:
 define arm_aapcs_vfpcc i32 @f2(i32 %f, i32 %pscr_value) {
 entry:
   %f.addr = alloca i32, align 4
-  store i32 %f, i32* %f.addr, align 4
-  call void asm sideeffect "vmsr fpscr,$1", "=*X,r"(i32* elementtype(i32) nonnull %f.addr, i32 %pscr_value) nounwind
-  %0 = load i32, i32* %f.addr, align 4
+  store i32 %f, ptr %f.addr, align 4
+  call void asm sideeffect "vmsr fpscr,$1", "=*X,r"(ptr elementtype(i32) nonnull %f.addr, i32 %pscr_value) nounwind
+  %0 = load i32, ptr %f.addr, align 4
   %mul = mul i32 %0, %0
   ret i32 %mul
 }
@@ -65,9 +65,9 @@ entry:
 define arm_aapcs_vfpcc <8 x i8> @f3() {
 entry:
   %vector_res_int8x8 = alloca <8 x i8>, align 8
-  %0 = getelementptr inbounds <8 x i8>, <8 x i8>* %vector_res_int8x8, i32 0, i32 0
-  call void asm sideeffect "vmsr fpscr,$1", "=*X,r"(<8 x i8>* elementtype(<8 x i8>) nonnull %vector_res_int8x8, i32 undef) nounwind
-  %1 = load <8 x i8>, <8 x i8>* %vector_res_int8x8, align 8
+  %0 = getelementptr inbounds <8 x i8>, ptr %vector_res_int8x8, i32 0, i32 0
+  call void asm sideeffect "vmsr fpscr,$1", "=*X,r"(ptr elementtype(<8 x i8>) nonnull %vector_res_int8x8, i32 undef) nounwind
+  %1 = load <8 x i8>, ptr %vector_res_int8x8, align 8
   %mul = mul <8 x i8> %1, %1
   ret <8 x i8> %mul
 }
@@ -96,7 +96,7 @@ entry:
 ; CHECK: bl f4
 define void @f5() {
 entry:
-  tail call void asm sideeffect "bl $0", "X"(void ()* nonnull @f4)
+  tail call void asm sideeffect "bl $0", "X"(ptr nonnull @f4)
   ret void
 }
 
@@ -104,23 +104,17 @@ declare void @foo(...)
 
 ; This tests the behavior of the X constraint when used on functions pointers,
 ; or functions with a cast. In the first asm call we figure out that this
-; is a function pointer and emit the label. However, in the second asm call
-; we can't see through the bitcast and we end up having to lower this constraint
-; to something else. This is not ideal, but it is a correct behaviour according
-; to the definition of the X constraint.
-;
-; In this case (and other cases where we could have emitted something else),
-; what we're doing with the X constraint is not particularly useful either,
-; since the user could have used "r" in this situation for the same effect.
+; is a function pointer and emit the label. With opaque pointers, we also do
+; so in the second case.
 
 ; CHECK-LABEL: f6
 ; CHECK: bl foo
-; CHECK: bl r
+; CHECK: bl f4
 
 define void @f6() nounwind {
 entry:
-  tail call void asm sideeffect "bl $0", "X"(void (...)* @foo) nounwind
-  tail call void asm sideeffect "bl $0", "X"(void (...)* bitcast (void ()* @f4 to void (...)*)) nounwind
+  tail call void asm sideeffect "bl $0", "X"(ptr @foo) nounwind
+  tail call void asm sideeffect "bl $0", "X"(ptr @f4) nounwind
   ret void
 }
 
@@ -141,7 +135,7 @@ entry:
 ; CHECK-LABEL: f7
 ; CHECK: bl
 define void @f7() {
-  call void asm sideeffect "bl $0", "X"( i8* blockaddress(@f7, %bb) )
+  call void asm sideeffect "bl $0", "X"( ptr blockaddress(@f7, %bb) )
   br label %bb
 bb:
   ret void
@@ -150,8 +144,8 @@ bb:
 ; If we use a constraint "=*X", we should get a store back to *%x (in r0).
 ; CHECK-LABEL: f8
 ; CHECK: str	r{{.*}}, [r0]
-define void @f8(i32 *%x) {
+define void @f8(ptr %x) {
 entry:
-  tail call void asm sideeffect "add $0, r0, r0", "=*X"(i32* elementtype(i32) %x)
+  tail call void asm sideeffect "add $0, r0, r0", "=*X"(ptr elementtype(i32) %x)
   ret void
 }

diff  --git a/llvm/test/CodeGen/ARM/lsr-setupcost.ll b/llvm/test/CodeGen/ARM/lsr-setupcost.ll
index d8af54ab5272..d9d0275e6f2a 100644
--- a/llvm/test/CodeGen/ARM/lsr-setupcost.ll
+++ b/llvm/test/CodeGen/ARM/lsr-setupcost.ll
@@ -1,39 +1,39 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -opaque-pointers=0 -mtriple=thumbv6m-none-eabi -loop-reduce %s -S -o - | FileCheck %s
+; RUN: opt -mtriple=thumbv6m-none-eabi -loop-reduce %s -S -o - | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
 
-%struct.arm_matrix_instance_q15 = type { i16, i16, i16* }
+%struct.arm_matrix_instance_q15 = type { i16, i16, ptr }
 
-define i32 @arm_mat_add_q15(%struct.arm_matrix_instance_q15* nocapture readonly %pSrcA, %struct.arm_matrix_instance_q15* nocapture readonly %pSrcB, %struct.arm_matrix_instance_q15* nocapture readonly %pDst)  {
+define i32 @arm_mat_add_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr nocapture readonly %pDst)  {
 ; CHECK-LABEL: @arm_mat_add_q15(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[NUMROWS:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15:%.*]], %struct.arm_matrix_instance_q15* [[PSRCA:%.*]], i32 0, i32 0
-; CHECK-NEXT:    [[I0:%.*]] = load i16, i16* [[NUMROWS]], align 4
-; CHECK-NEXT:    [[NUMCOLS:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15]], %struct.arm_matrix_instance_q15* [[PSRCA]], i32 0, i32 1
-; CHECK-NEXT:    [[I1:%.*]] = load i16, i16* [[NUMCOLS]], align 2
+; CHECK-NEXT:    [[NUMROWS:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15:%.*]], ptr [[PSRCA:%.*]], i32 0, i32 0
+; CHECK-NEXT:    [[I0:%.*]] = load i16, ptr [[NUMROWS]], align 4
+; CHECK-NEXT:    [[NUMCOLS:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15]], ptr [[PSRCA]], i32 0, i32 1
+; CHECK-NEXT:    [[I1:%.*]] = load i16, ptr [[NUMCOLS]], align 2
 ; CHECK-NEXT:    [[MUL:%.*]] = mul i16 [[I1]], [[I0]]
 ; CHECK-NEXT:    [[CMP22:%.*]] = icmp eq i16 [[MUL]], 0
 ; CHECK-NEXT:    br i1 [[CMP22]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]
 ; CHECK:       while.body.preheader:
 ; CHECK-NEXT:    [[CONV5:%.*]] = zext i16 [[MUL]] to i32
-; CHECK-NEXT:    [[PDATA2:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15]], %struct.arm_matrix_instance_q15* [[PDST:%.*]], i32 0, i32 2
-; CHECK-NEXT:    [[I2:%.*]] = load i16*, i16** [[PDATA2]], align 4
-; CHECK-NEXT:    [[PDATA1:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15]], %struct.arm_matrix_instance_q15* [[PSRCB:%.*]], i32 0, i32 2
-; CHECK-NEXT:    [[I3:%.*]] = load i16*, i16** [[PDATA1]], align 4
-; CHECK-NEXT:    [[PDATA:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15]], %struct.arm_matrix_instance_q15* [[PSRCA]], i32 0, i32 2
-; CHECK-NEXT:    [[I4:%.*]] = load i16*, i16** [[PDATA]], align 4
+; CHECK-NEXT:    [[PDATA2:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15]], ptr [[PDST:%.*]], i32 0, i32 2
+; CHECK-NEXT:    [[I2:%.*]] = load ptr, ptr [[PDATA2]], align 4
+; CHECK-NEXT:    [[PDATA1:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15]], ptr [[PSRCB:%.*]], i32 0, i32 2
+; CHECK-NEXT:    [[I3:%.*]] = load ptr, ptr [[PDATA1]], align 4
+; CHECK-NEXT:    [[PDATA:%.*]] = getelementptr inbounds [[STRUCT_ARM_MATRIX_INSTANCE_Q15]], ptr [[PSRCA]], i32 0, i32 2
+; CHECK-NEXT:    [[I4:%.*]] = load ptr, ptr [[PDATA]], align 4
 ; CHECK-NEXT:    br label [[WHILE_BODY:%.*]]
 ; CHECK:       while.body:
-; CHECK-NEXT:    [[PINA_026:%.*]] = phi i16* [ [[INCDEC_PTR:%.*]], [[WHILE_BODY]] ], [ [[I4]], [[WHILE_BODY_PREHEADER]] ]
+; CHECK-NEXT:    [[PINA_026:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[WHILE_BODY]] ], [ [[I4]], [[WHILE_BODY_PREHEADER]] ]
 ; CHECK-NEXT:    [[BLKCNT_025:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY]] ], [ [[CONV5]], [[WHILE_BODY_PREHEADER]] ]
-; CHECK-NEXT:    [[PINB_024:%.*]] = phi i16* [ [[INCDEC_PTR8:%.*]], [[WHILE_BODY]] ], [ [[I3]], [[WHILE_BODY_PREHEADER]] ]
-; CHECK-NEXT:    [[POUT_023:%.*]] = phi i16* [ [[INCDEC_PTR11:%.*]], [[WHILE_BODY]] ], [ [[I2]], [[WHILE_BODY_PREHEADER]] ]
-; CHECK-NEXT:    [[INCDEC_PTR]] = getelementptr inbounds i16, i16* [[PINA_026]], i32 1
-; CHECK-NEXT:    [[I5:%.*]] = load i16, i16* [[PINA_026]], align 2
+; CHECK-NEXT:    [[PINB_024:%.*]] = phi ptr [ [[INCDEC_PTR8:%.*]], [[WHILE_BODY]] ], [ [[I3]], [[WHILE_BODY_PREHEADER]] ]
+; CHECK-NEXT:    [[POUT_023:%.*]] = phi ptr [ [[INCDEC_PTR11:%.*]], [[WHILE_BODY]] ], [ [[I2]], [[WHILE_BODY_PREHEADER]] ]
+; CHECK-NEXT:    [[INCDEC_PTR]] = getelementptr inbounds i16, ptr [[PINA_026]], i32 1
+; CHECK-NEXT:    [[I5:%.*]] = load i16, ptr [[PINA_026]], align 2
 ; CHECK-NEXT:    [[CONV7:%.*]] = sext i16 [[I5]] to i32
-; CHECK-NEXT:    [[INCDEC_PTR8]] = getelementptr inbounds i16, i16* [[PINB_024]], i32 1
-; CHECK-NEXT:    [[I6:%.*]] = load i16, i16* [[PINB_024]], align 2
+; CHECK-NEXT:    [[INCDEC_PTR8]] = getelementptr inbounds i16, ptr [[PINB_024]], i32 1
+; CHECK-NEXT:    [[I6:%.*]] = load i16, ptr [[PINB_024]], align 2
 ; CHECK-NEXT:    [[CONV9:%.*]] = sext i16 [[I6]] to i32
 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV9]], [[CONV7]]
 ; CHECK-NEXT:    [[I7:%.*]] = icmp sgt i32 [[ADD]], -32768
@@ -41,8 +41,8 @@ define i32 @arm_mat_add_q15(%struct.arm_matrix_instance_q15* nocapture readonly
 ; CHECK-NEXT:    [[I8:%.*]] = icmp slt i32 [[SPEC_SELECT_I]], 32767
 ; CHECK-NEXT:    [[CALL21:%.*]] = select i1 [[I8]], i32 [[SPEC_SELECT_I]], i32 32767
 ; CHECK-NEXT:    [[CONV10:%.*]] = trunc i32 [[CALL21]] to i16
-; CHECK-NEXT:    [[INCDEC_PTR11]] = getelementptr inbounds i16, i16* [[POUT_023]], i32 1
-; CHECK-NEXT:    store i16 [[CONV10]], i16* [[POUT_023]], align 2
+; CHECK-NEXT:    [[INCDEC_PTR11]] = getelementptr inbounds i16, ptr [[POUT_023]], i32 1
+; CHECK-NEXT:    store i16 [[CONV10]], ptr [[POUT_023]], align 2
 ; CHECK-NEXT:    [[DEC]] = add nsw i32 [[BLKCNT_025]], -1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[DEC]], 0
 ; CHECK-NEXT:    br i1 [[CMP]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY]]
@@ -52,34 +52,34 @@ define i32 @arm_mat_add_q15(%struct.arm_matrix_instance_q15* nocapture readonly
 ; CHECK-NEXT:    ret i32 0
 ;
 entry:
-  %numRows = getelementptr inbounds %struct.arm_matrix_instance_q15, %struct.arm_matrix_instance_q15* %pSrcA, i32 0, i32 0
-  %i0 = load i16, i16* %numRows, align 4
-  %numCols = getelementptr inbounds %struct.arm_matrix_instance_q15, %struct.arm_matrix_instance_q15* %pSrcA, i32 0, i32 1
-  %i1 = load i16, i16* %numCols, align 2
+  %numRows = getelementptr inbounds %struct.arm_matrix_instance_q15, ptr %pSrcA, i32 0, i32 0
+  %i0 = load i16, ptr %numRows, align 4
+  %numCols = getelementptr inbounds %struct.arm_matrix_instance_q15, ptr %pSrcA, i32 0, i32 1
+  %i1 = load i16, ptr %numCols, align 2
   %mul = mul i16 %i1, %i0
   %cmp22 = icmp eq i16 %mul, 0
   br i1 %cmp22, label %while.end, label %while.body.preheader
 
 while.body.preheader:                             ; preds = %entry
   %conv5 = zext i16 %mul to i32
-  %pData2 = getelementptr inbounds %struct.arm_matrix_instance_q15, %struct.arm_matrix_instance_q15* %pDst, i32 0, i32 2
-  %i2 = load i16*, i16** %pData2, align 4
-  %pData1 = getelementptr inbounds %struct.arm_matrix_instance_q15, %struct.arm_matrix_instance_q15* %pSrcB, i32 0, i32 2
-  %i3 = load i16*, i16** %pData1, align 4
-  %pData = getelementptr inbounds %struct.arm_matrix_instance_q15, %struct.arm_matrix_instance_q15* %pSrcA, i32 0, i32 2
-  %i4 = load i16*, i16** %pData, align 4
+  %pData2 = getelementptr inbounds %struct.arm_matrix_instance_q15, ptr %pDst, i32 0, i32 2
+  %i2 = load ptr, ptr %pData2, align 4
+  %pData1 = getelementptr inbounds %struct.arm_matrix_instance_q15, ptr %pSrcB, i32 0, i32 2
+  %i3 = load ptr, ptr %pData1, align 4
+  %pData = getelementptr inbounds %struct.arm_matrix_instance_q15, ptr %pSrcA, i32 0, i32 2
+  %i4 = load ptr, ptr %pData, align 4
   br label %while.body
 
 while.body:                                       ; preds = %while.body.preheader, %while.body
-  %pInA.026 = phi i16* [ %incdec.ptr, %while.body ], [ %i4, %while.body.preheader ]
+  %pInA.026 = phi ptr [ %incdec.ptr, %while.body ], [ %i4, %while.body.preheader ]
   %blkCnt.025 = phi i32 [ %dec, %while.body ], [ %conv5, %while.body.preheader ]
-  %pInB.024 = phi i16* [ %incdec.ptr8, %while.body ], [ %i3, %while.body.preheader ]
-  %pOut.023 = phi i16* [ %incdec.ptr11, %while.body ], [ %i2, %while.body.preheader ]
-  %incdec.ptr = getelementptr inbounds i16, i16* %pInA.026, i32 1
-  %i5 = load i16, i16* %pInA.026, align 2
+  %pInB.024 = phi ptr [ %incdec.ptr8, %while.body ], [ %i3, %while.body.preheader ]
+  %pOut.023 = phi ptr [ %incdec.ptr11, %while.body ], [ %i2, %while.body.preheader ]
+  %incdec.ptr = getelementptr inbounds i16, ptr %pInA.026, i32 1
+  %i5 = load i16, ptr %pInA.026, align 2
   %conv7 = sext i16 %i5 to i32
-  %incdec.ptr8 = getelementptr inbounds i16, i16* %pInB.024, i32 1
-  %i6 = load i16, i16* %pInB.024, align 2
+  %incdec.ptr8 = getelementptr inbounds i16, ptr %pInB.024, i32 1
+  %i6 = load i16, ptr %pInB.024, align 2
   %conv9 = sext i16 %i6 to i32
   %add = add nsw i32 %conv9, %conv7
   %i7 = icmp sgt i32 %add, -32768
@@ -87,8 +87,8 @@ while.body:                                       ; preds = %while.body.preheade
   %i8 = icmp slt i32 %spec.select.i, 32767
   %call21 = select i1 %i8, i32 %spec.select.i, i32 32767
   %conv10 = trunc i32 %call21 to i16
-  %incdec.ptr11 = getelementptr inbounds i16, i16* %pOut.023, i32 1
-  store i16 %conv10, i16* %pOut.023, align 2
+  %incdec.ptr11 = getelementptr inbounds i16, ptr %pOut.023, i32 1
+  store i16 %conv10, ptr %pOut.023, align 2
   %dec = add nsw i32 %blkCnt.025, -1
   %cmp = icmp eq i32 %dec, 0
   br i1 %cmp, label %while.end, label %while.body

diff  --git a/llvm/test/CodeGen/ARM/shifter_operand.ll b/llvm/test/CodeGen/ARM/shifter_operand.ll
index 9775e0043684..f62f195e1d73 100644
--- a/llvm/test/CodeGen/ARM/shifter_operand.ll
+++ b/llvm/test/CodeGen/ARM/shifter_operand.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -opaque-pointers=0 < %s -mtriple=armv7-none-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-ARM
-; RUN: llc -opaque-pointers=0 < %s -mtriple=armv7-none-eabi -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK-ARM
-; RUN: llc -opaque-pointers=0 < %s -mtriple=thumbv7m-none-eabi | FileCheck %s -check-prefix=CHECK-THUMB
+; RUN: llc < %s -mtriple=armv7-none-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-ARM
+; RUN: llc < %s -mtriple=armv7-none-eabi -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK-ARM
+; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s -check-prefix=CHECK-THUMB
 ; rdar://8576755
 
 
@@ -61,16 +61,16 @@ define i32 @test3(i32 %base, i32 %base2, i32 %offset) {
 entry:
         %tmp1 = shl i32 %offset, 2
         %tmp2 = add i32 %base, %tmp1
-        %tmp3 = inttoptr i32 %tmp2 to i32*
+        %tmp3 = inttoptr i32 %tmp2 to ptr
         %tmp4 = add i32 %base2, %tmp1
-        %tmp5 = inttoptr i32 %tmp4 to i32*
-        %tmp6 = load i32, i32* %tmp3
-        %tmp7 = load i32, i32* %tmp5
+        %tmp5 = inttoptr i32 %tmp4 to ptr
+        %tmp6 = load i32, ptr %tmp3
+        %tmp7 = load i32, ptr %tmp5
         %tmp8 = add i32 %tmp7, %tmp6
         ret i32 %tmp8
 }
 
-declare i8* @malloc(...)
+declare ptr @malloc(...)
 
 define fastcc void @test4(i16 %addr) nounwind {
 ; CHECK-ARM-LABEL: test4:
@@ -97,13 +97,12 @@ define fastcc void @test4(i16 %addr) nounwind {
 ; CHECK-THUMB-NEXT:    str.w r2, [r0, r1, lsl #2]
 ; CHECK-THUMB-NEXT:    pop {r4, pc}
 entry:
-  %0 = tail call i8* (...) @malloc(i32 undef) nounwind
-  %1 = bitcast i8* %0 to i32*
-  %2 = sext i16 %addr to i32
-  %3 = getelementptr inbounds i32, i32* %1, i32 %2
-  %4 = load i32, i32* %3, align 4
-  %5 = add nsw i32 %4, 1
-  store i32 %5, i32* %3, align 4
+  %0 = tail call ptr (...) @malloc(i32 undef) nounwind
+  %1 = sext i16 %addr to i32
+  %2 = getelementptr inbounds i32, ptr %0, i32 %1
+  %3 = load i32, ptr %2, align 4
+  %4 = add nsw i32 %3, 1
+  store i32 %4, ptr %2, align 4
   ret void
 }
 
@@ -228,7 +227,7 @@ entry:
   ret i32 %or
 }
 
-define i32 @test_load_extract_from_mul_1(i8* %x, i32 %y) {
+define i32 @test_load_extract_from_mul_1(ptr %x, i32 %y) {
 ; CHECK-ARM-LABEL: test_load_extract_from_mul_1:
 ; CHECK-ARM:       @ %bb.0: @ %entry
 ; CHECK-ARM-NEXT:    movw r2, #63767
@@ -244,13 +243,13 @@ define i32 @test_load_extract_from_mul_1(i8* %x, i32 %y) {
 ; CHECK-THUMB-NEXT:    bx lr
 entry:
   %mul = mul i32 %y, 63767
-  %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul
-  %0 = load i8, i8* %arrayidx, align 1
+  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul
+  %0 = load i8, ptr %arrayidx, align 1
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
-define i32 @test_load_extract_from_mul_2(i8* %x, i32 %y) {
+define i32 @test_load_extract_from_mul_2(ptr %x, i32 %y) {
 ; CHECK-ARM-LABEL: test_load_extract_from_mul_2:
 ; CHECK-ARM:       @ %bb.0: @ %entry
 ; CHECK-ARM-NEXT:    movw r2, #63767
@@ -266,13 +265,13 @@ define i32 @test_load_extract_from_mul_2(i8* %x, i32 %y) {
 ; CHECK-THUMB-NEXT:    bx lr
 entry:
   %mul1 = mul i32 %y, 127534
-  %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
-  %0 = load i8, i8* %arrayidx, align 1
+  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul1
+  %0 = load i8, ptr %arrayidx, align 1
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
-define i32 @test_load_extract_from_mul_3(i8* %x, i32 %y) {
+define i32 @test_load_extract_from_mul_3(ptr %x, i32 %y) {
 ; CHECK-ARM-LABEL: test_load_extract_from_mul_3:
 ; CHECK-ARM:       @ %bb.0: @ %entry
 ; CHECK-ARM-NEXT:    movw r2, #63767
@@ -288,13 +287,13 @@ define i32 @test_load_extract_from_mul_3(i8* %x, i32 %y) {
 ; CHECK-THUMB-NEXT:    bx lr
 entry:
   %mul1 = mul i32 %y, 255068
-  %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
-  %0 = load i8, i8* %arrayidx, align 1
+  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul1
+  %0 = load i8, ptr %arrayidx, align 1
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
-define i32 @test_load_extract_from_mul_4(i8* %x, i32 %y) {
+define i32 @test_load_extract_from_mul_4(ptr %x, i32 %y) {
 ; CHECK-ARM-LABEL: test_load_extract_from_mul_4:
 ; CHECK-ARM:       @ %bb.0: @ %entry
 ; CHECK-ARM-NEXT:    movw r2, #63767
@@ -310,13 +309,13 @@ define i32 @test_load_extract_from_mul_4(i8* %x, i32 %y) {
 ; CHECK-THUMB-NEXT:    bx lr
 entry:
   %mul1 = mul i32 %y, 510136
-  %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
-  %0 = load i8, i8* %arrayidx, align 1
+  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul1
+  %0 = load i8, ptr %arrayidx, align 1
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
-define i32 @test_load_extract_from_mul_5(i8* %x, i32 %y) {
+define i32 @test_load_extract_from_mul_5(ptr %x, i32 %y) {
 ; CHECK-ARM-LABEL: test_load_extract_from_mul_5:
 ; CHECK-ARM:       @ %bb.0: @ %entry
 ; CHECK-ARM-NEXT:    movw r2, #63767
@@ -333,13 +332,13 @@ define i32 @test_load_extract_from_mul_5(i8* %x, i32 %y) {
 ; CHECK-THUMB-NEXT:    bx lr
 entry:
   %mul1 = mul i32 %y, 1020272
-  %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
-  %0 = load i8, i8* %arrayidx, align 1
+  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul1
+  %0 = load i8, ptr %arrayidx, align 1
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
-define i32 @test_load_extract_from_mul_6(i8* %x, i32 %y) {
+define i32 @test_load_extract_from_mul_6(ptr %x, i32 %y) {
 ; CHECK-ARM-LABEL: test_load_extract_from_mul_6:
 ; CHECK-ARM:       @ %bb.0: @ %entry
 ; CHECK-ARM-NEXT:    movw r2, #63767
@@ -356,14 +355,14 @@ define i32 @test_load_extract_from_mul_6(i8* %x, i32 %y) {
 ; CHECK-THUMB-NEXT:    bx lr
 entry:
   %mul = mul i32 %y, -115933184
-  %arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul
-  %0 = load i8, i8* %arrayidx, align 1
+  %arrayidx = getelementptr inbounds i8, ptr %x, i32 %mul
+  %0 = load i8, ptr %arrayidx, align 1
   %conv = zext i8 %0 to i32
   ret i32 %conv
 }
 
 
-define void @test_well_formed_dag(i32 %in1, i32 %in2, i32* %addr) {
+define void @test_well_formed_dag(i32 %in1, i32 %in2, ptr %addr) {
 ; CHECK-ARM-LABEL: test_well_formed_dag:
 ; CHECK-ARM:       @ %bb.0:
 ; CHECK-ARM-NEXT:    movw r3, #675
@@ -381,10 +380,10 @@ define void @test_well_formed_dag(i32 %in1, i32 %in2, i32* %addr) {
 ; CHECK-THUMB-NEXT:    bx lr
 
   %mul.small = mul i32 %in1, 675
-  store i32 %mul.small, i32* %addr
+  store i32 %mul.small, ptr %addr
   %mul.big = mul i32 %in1, 86400
   %add = add i32 %in2, %mul.big
-  store i32 %add, i32* %addr
+  store i32 %add, ptr %addr
   ret void
 }
 
@@ -410,8 +409,8 @@ define { i32, i32 } @test_multi_use_add(i32 %base, i32 %offset) {
   %prod = mul i32 %offset, 65564
   %sum = add i32 %base, %prod
 
-  %ptr = inttoptr i32 %sum to i32*
-  %loaded = load i32, i32* %ptr
+  %ptr = inttoptr i32 %sum to ptr
+  %loaded = load i32, ptr %ptr
 
   %ret.tmp = insertvalue { i32, i32 } undef, i32 %sum, 0
   %ret = insertvalue { i32, i32 } %ret.tmp, i32 %loaded, 1
@@ -445,35 +444,41 @@ entry:
 define void @test_mutateddag(i32 %b, i32 %c, i32 %d, i1 %cc) {
 ; CHECK-THUMB-LABEL: test_mutateddag:
 ; CHECK-THUMB:       @ %bb.0: @ %entry
-; CHECK-THUMB-NEXT:    .save {r4, lr}
-; CHECK-THUMB-NEXT:    push {r4, lr}
+; CHECK-THUMB-NEXT:    .save {r4, r5, r7, lr}
+; CHECK-THUMB-NEXT:    push {r4, r5, r7, lr}
 ; CHECK-THUMB-NEXT:    movw r12, #50608
 ; CHECK-THUMB-NEXT:    movw r4, #51512
 ; CHECK-THUMB-NEXT:    movt r12, #17917
 ; CHECK-THUMB-NEXT:    movt r4, #52
 ; CHECK-THUMB-NEXT:    mla r12, r1, r4, r12
 ; CHECK-THUMB-NEXT:    mov.w r4, #450
-; CHECK-THUMB-NEXT:    lsls r3, r3, #31
+; CHECK-THUMB-NEXT:    movw r5, :lower16:arr_9
 ; CHECK-THUMB-NEXT:    mul lr, r0, r4
-; CHECK-THUMB-NEXT:    movw r0, #48047
+; CHECK-THUMB-NEXT:    movw r0, #12878
+; CHECK-THUMB-NEXT:    movt r0, #13
 ; CHECK-THUMB-NEXT:    muls r0, r1, r0
-; CHECK-THUMB-NEXT:    movw r1, :lower16:arr_9
-; CHECK-THUMB-NEXT:    movt r1, :upper16:arr_9
-; CHECK-THUMB-NEXT:    add.w r0, r2, r0, lsl #1
-; CHECK-THUMB-NEXT:    movw r2, #24420
-; CHECK-THUMB-NEXT:    movt r2, #19356
-; CHECK-THUMB-NEXT:    add.w r0, r0, r0, lsl #3
-; CHECK-THUMB-NEXT:    add.w r0, r1, r0, lsl #1
-; CHECK-THUMB-NEXT:    movw r1, #60920
-; CHECK-THUMB-NEXT:    movt r1, #64028
+; CHECK-THUMB-NEXT:    add.w r4, r2, r2, lsl #3
+; CHECK-THUMB-NEXT:    movw r2, #60920
+; CHECK-THUMB-NEXT:    movt r5, :upper16:arr_9
+; CHECK-THUMB-NEXT:    movt r2, #64028
+; CHECK-THUMB-NEXT:    lsls r3, r3, #31
+; CHECK-THUMB-NEXT:    add.w r0, r0, r4, lsl #1
+; CHECK-THUMB-NEXT:    add r0, r5
 ; CHECK-THUMB-NEXT:    add r2, r0
+; CHECK-THUMB-NEXT:    movw r0, #25756
+; CHECK-THUMB-NEXT:    movt r0, #26
+; CHECK-THUMB-NEXT:    muls r0, r1, r0
+; CHECK-THUMB-NEXT:    movw r1, #24420
+; CHECK-THUMB-NEXT:    movt r1, #19356
+; CHECK-THUMB-NEXT:    add.w r0, r0, r4, lsl #1
+; CHECK-THUMB-NEXT:    add r0, r5
 ; CHECK-THUMB-NEXT:    add r1, r0
 ; CHECK-THUMB-NEXT:    movs r0, #0
 ; CHECK-THUMB-NEXT:    b .LBB19_2
 ; CHECK-THUMB-NEXT:  .LBB19_1: @ %for.cond1.for.cond.cleanup_crit_edge
 ; CHECK-THUMB-NEXT:    @ in Loop: Header=BB19_2 Depth=1
-; CHECK-THUMB-NEXT:    add r1, lr
 ; CHECK-THUMB-NEXT:    add r2, lr
+; CHECK-THUMB-NEXT:    add r1, lr
 ; CHECK-THUMB-NEXT:  .LBB19_2: @ %for.cond
 ; CHECK-THUMB-NEXT:    @ =>This Loop Header: Depth=1
 ; CHECK-THUMB-NEXT:    @ Child Loop BB19_3 Depth 2
@@ -482,11 +487,11 @@ define void @test_mutateddag(i32 %b, i32 %c, i32 %d, i1 %cc) {
 ; CHECK-THUMB-NEXT:    @ Parent Loop BB19_2 Depth=1
 ; CHECK-THUMB-NEXT:    @ => This Inner Loop Header: Depth=2
 ; CHECK-THUMB-NEXT:    cmp r3, #0
-; CHECK-THUMB-NEXT:    str r0, [r1, r4]
+; CHECK-THUMB-NEXT:    str r0, [r2, r4]
 ; CHECK-THUMB-NEXT:    bne .LBB19_1
 ; CHECK-THUMB-NEXT:  @ %bb.4: @ %for.cond2.preheader.2
 ; CHECK-THUMB-NEXT:    @ in Loop: Header=BB19_3 Depth=2
-; CHECK-THUMB-NEXT:    str r0, [r2, r4]
+; CHECK-THUMB-NEXT:    str r0, [r1, r4]
 ; CHECK-THUMB-NEXT:    add r4, r12
 ; CHECK-THUMB-NEXT:    b .LBB19_3
 entry:
@@ -505,17 +510,15 @@ for.cond2.preheader:                              ; preds = %for.cond2.preheader
   %indvar24 = phi i32 [ 0, %for.cond ], [ %indvar.next25.3, %for.cond2.preheader.2 ]
   %indvar.next25 = or i32 %indvar24, 1
   %l5 = mul i32 %2, %indvar.next25
-  %scevgep.1 = getelementptr [15 x [25 x [18 x i8]]], [15 x [25 x [18 x i8]]]* @arr_9, i32 -217196, i32 %4, i32 %0, i32 %l5
-  %l7 = bitcast i8* %scevgep.1 to i32*
-  store i32 0, i32* %l7, align 1
+  %scevgep.1 = getelementptr [15 x [25 x [18 x i8]]], ptr @arr_9, i32 -217196, i32 %4, i32 %0, i32 %l5
+  store i32 0, ptr %scevgep.1, align 1
   br i1 %cc, label %for.cond1.for.cond.cleanup_crit_edge, label %for.cond2.preheader.2
 
 for.cond2.preheader.2:                            ; preds = %for.cond2.preheader
   %indvar.next25.1 = or i32 %indvar24, 2
   %l8 = mul i32 %2, %indvar.next25.1
-  %scevgep.2 = getelementptr [15 x [25 x [18 x i8]]], [15 x [25 x [18 x i8]]]* @arr_9, i32 -217196, i32 %4, i32 %0, i32 %l8
-  %l10 = bitcast i8* %scevgep.2 to i32*
-  store i32 0, i32* %l10, align 1
+  %scevgep.2 = getelementptr [15 x [25 x [18 x i8]]], ptr @arr_9, i32 -217196, i32 %4, i32 %0, i32 %l8
+  store i32 0, ptr %scevgep.2, align 1
   %indvar.next25.3 = add i32 %indvar24, 4
   br label %for.cond2.preheader
 


        


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