[llvm] 6d0e9c2 - [LoongArch][NFC] Add tests of multiplication with immediates
Ben Shi via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 2 07:13:11 PDT 2023
Author: Ben Shi
Date: 2023-04-02T22:12:48+08:00
New Revision: 6d0e9c269c83002107bbb8e31540cf0f519306f2
URL: https://github.com/llvm/llvm-project/commit/6d0e9c269c83002107bbb8e31540cf0f519306f2
DIFF: https://github.com/llvm/llvm-project/commit/6d0e9c269c83002107bbb8e31540cf0f519306f2.diff
LOG: [LoongArch][NFC] Add tests of multiplication with immediates
Reviewed By: xen0n, SixWeining
Differential Revision: https://reviews.llvm.org/D147398
Added:
Modified:
llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
index 7be005f599532..bf9f0e9a3cc03 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll
@@ -365,6 +365,23 @@ define signext i32 @mul_i32_25(i32 %a) {
ret i32 %b
}
+define signext i32 @mul_i32_27(i32 %a) {
+; LA32-LABEL: mul_i32_27:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a1, $zero, 27
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_27:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 27
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 27
+ ret i32 %b
+}
+
define signext i32 @mul_i32_35(i32 %a) {
; LA32-LABEL: mul_i32_35:
; LA32: # %bb.0:
@@ -413,6 +430,23 @@ define signext i32 @mul_i32_41(i32 %a) {
ret i32 %b
}
+define signext i32 @mul_i32_45(i32 %a) {
+; LA32-LABEL: mul_i32_45:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a1, $zero, 45
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_45:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 45
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 45
+ ret i32 %b
+}
+
define signext i32 @mul_i32_49(i32 %a) {
; LA32-LABEL: mul_i32_49:
; LA32: # %bb.0:
@@ -429,6 +463,23 @@ define signext i32 @mul_i32_49(i32 %a) {
ret i32 %b
}
+define signext i32 @mul_i32_51(i32 %a) {
+; LA32-LABEL: mul_i32_51:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a1, $zero, 51
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_51:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 51
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 51
+ ret i32 %b
+}
+
define signext i32 @mul_i32_69(i32 %a) {
; LA32-LABEL: mul_i32_69:
; LA32: # %bb.0:
@@ -477,6 +528,23 @@ define signext i32 @mul_i32_81(i32 %a) {
ret i32 %b
}
+define signext i32 @mul_i32_85(i32 %a) {
+; LA32-LABEL: mul_i32_85:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a1, $zero, 85
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_85:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 85
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 85
+ ret i32 %b
+}
+
define signext i32 @mul_i32_137(i32 %a) {
; LA32-LABEL: mul_i32_137:
; LA32: # %bb.0:
@@ -509,6 +577,23 @@ define signext i32 @mul_i32_145(i32 %a) {
ret i32 %b
}
+define signext i32 @mul_i32_153(i32 %a) {
+; LA32-LABEL: mul_i32_153:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a1, $zero, 153
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_153:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 153
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 153
+ ret i32 %b
+}
+
define signext i32 @mul_i32_273(i32 %a) {
; LA32-LABEL: mul_i32_273:
; LA32: # %bb.0:
@@ -525,6 +610,23 @@ define signext i32 @mul_i32_273(i32 %a) {
ret i32 %b
}
+define signext i32 @mul_i32_289(i32 %a) {
+; LA32-LABEL: mul_i32_289:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a1, $zero, 289
+; LA32-NEXT: mul.w $a0, $a0, $a1
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i32_289:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 289
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: addi.w $a0, $a0, 0
+; LA64-NEXT: ret
+ %b = mul i32 %a, 289
+ ret i32 %b
+}
+
define i64 @mul_i64_11(i64 %a) {
; LA32-LABEL: mul_i64_11:
; LA32: # %bb.0:
@@ -620,6 +722,25 @@ define i64 @mul_i64_25(i64 %a) {
ret i64 %b
}
+define i64 @mul_i64_27(i64 %a) {
+; LA32-LABEL: mul_i64_27:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a2, $zero, 27
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_27:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 27
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 27
+ ret i64 %b
+}
+
define i64 @mul_i64_35(i64 %a) {
; LA32-LABEL: mul_i64_35:
; LA32: # %bb.0:
@@ -677,6 +798,25 @@ define i64 @mul_i64_41(i64 %a) {
ret i64 %b
}
+define i64 @mul_i64_45(i64 %a) {
+; LA32-LABEL: mul_i64_45:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a2, $zero, 45
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_45:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 45
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 45
+ ret i64 %b
+}
+
define i64 @mul_i64_49(i64 %a) {
; LA32-LABEL: mul_i64_49:
; LA32: # %bb.0:
@@ -696,6 +836,25 @@ define i64 @mul_i64_49(i64 %a) {
ret i64 %b
}
+define i64 @mul_i64_51(i64 %a) {
+; LA32-LABEL: mul_i64_51:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a2, $zero, 51
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_51:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 51
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 51
+ ret i64 %b
+}
+
define i64 @mul_i64_69(i64 %a) {
; LA32-LABEL: mul_i64_69:
; LA32: # %bb.0:
@@ -753,6 +912,25 @@ define i64 @mul_i64_81(i64 %a) {
ret i64 %b
}
+define i64 @mul_i64_85(i64 %a) {
+; LA32-LABEL: mul_i64_85:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a2, $zero, 85
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_85:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 85
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 85
+ ret i64 %b
+}
+
define i64 @mul_i64_137(i64 %a) {
; LA32-LABEL: mul_i64_137:
; LA32: # %bb.0:
@@ -791,6 +969,25 @@ define i64 @mul_i64_145(i64 %a) {
ret i64 %b
}
+define i64 @mul_i64_153(i64 %a) {
+; LA32-LABEL: mul_i64_153:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a2, $zero, 153
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_153:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 153
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 153
+ ret i64 %b
+}
+
define i64 @mul_i64_273(i64 %a) {
; LA32-LABEL: mul_i64_273:
; LA32: # %bb.0:
@@ -809,3 +1006,22 @@ define i64 @mul_i64_273(i64 %a) {
%b = mul i64 %a, 273
ret i64 %b
}
+
+define i64 @mul_i64_289(i64 %a) {
+; LA32-LABEL: mul_i64_289:
+; LA32: # %bb.0:
+; LA32-NEXT: ori $a2, $zero, 289
+; LA32-NEXT: mul.w $a1, $a1, $a2
+; LA32-NEXT: mulh.wu $a3, $a0, $a2
+; LA32-NEXT: add.w $a1, $a3, $a1
+; LA32-NEXT: mul.w $a0, $a0, $a2
+; LA32-NEXT: ret
+;
+; LA64-LABEL: mul_i64_289:
+; LA64: # %bb.0:
+; LA64-NEXT: ori $a1, $zero, 289
+; LA64-NEXT: mul.d $a0, $a0, $a1
+; LA64-NEXT: ret
+ %b = mul i64 %a, 289
+ ret i64 %b
+}
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