[PATCH] D146198: [RISCV] Make Latency/ResourceCycles relevant to LMUL

[Wang Pengcheng via Phabricator via llvm-commits]

pcwang-thead added a comment.

@craig.topper Is this what you suggest? It seems to be OK for cases where only `LMUL` is taken into consideration. But when both `SEW` and `LMUL` are accounted for, would it be too complicated to generate two-dimension lists?


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  https://reviews.llvm.org/D146198/new/

https://reviews.llvm.org/D146198