[PATCH] D145583: [AArch64][SME] Fix an infinite loop in DAGCombine related to adding -force-streaming-compatible-sve flag.

Dinar Temirbulatov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 27 06:05:14 PDT 2023


dtemirbulatov added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:911
+; CHECK-NEXT:    ret
+  %broadcast.splatinsert2 = insertelement <8 x i32> poison, i32 %0, i64 0
+  %broadcast.splat3 = shufflevector <8 x i32> %broadcast.splatinsert2, <8 x i32> zeroinitializer, <8 x i32> zeroinitializer
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sdesmalen wrote:
> nit: If you replace the `8` here by a smaller number like `2`, then we don't need to observe the effect of legalisation and we'd only get `1` mul instead of `4`.
I could not reproduce the issue with <2 x > type.


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Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:919
+
+define void @zero_extend_no_mul(ptr %s, i16 %0) #0 {
+; CHECK-LABEL: zero_extend_no_mul:
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sdesmalen wrote:
> This test is different from the one above in ways //other// than the `mul`. Can you make the tests otherwise identical?
> 
> Can you also verify that it still exercises the code you've added to your patch?
I can reproduce the error with updated test.


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https://reviews.llvm.org/D145583



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