[llvm] 8e85bed - [Test] Regenerate test checks for some LSR tests (NFC)
Dmitry Makogon via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 24 07:24:57 PDT 2023
Author: Dmitry Makogon
Date: 2023-03-24T21:24:22+07:00
New Revision: 8e85bede79baab3dd47b26376e8ed0f6e77d0690
URL: https://github.com/llvm/llvm-project/commit/8e85bede79baab3dd47b26376e8ed0f6e77d0690
DIFF: https://github.com/llvm/llvm-project/commit/8e85bede79baab3dd47b26376e8ed0f6e77d0690.diff
LOG: [Test] Regenerate test checks for some LSR tests (NFC)
Added:
Modified:
llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll
llvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll
llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll b/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll
index c17ca9643a2ab..334a0d0f8a99f 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll
@@ -18,18 +18,18 @@ define amdgpu_kernel void @scaledregtest() local_unnamed_addr {
; CHECK: loopexit:
; CHECK-NEXT: br label [[FOR_BODY_1:%.*]]
; CHECK: for.body.1:
-; CHECK-NEXT: [[LSR_IV5:%.*]] = phi ptr addrspace(5) [ [[UGLYGEP6:%.*]], [[FOR_BODY_1]] ], [ [[UGLYGEP11:%.*]], [[LOOPEXIT:%.*]] ]
-; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[UGLYGEP2:%.*]], [[FOR_BODY_1]] ], [ [[UGLYGEP13:%.*]], [[LOOPEXIT]] ]
+; CHECK-NEXT: [[LSR_IV5:%.*]] = phi ptr addrspace(5) [ [[SCEVGEP6:%.*]], [[FOR_BODY_1]] ], [ [[SCEVGEP11:%.*]], [[LOOPEXIT:%.*]] ]
+; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[SCEVGEP2:%.*]], [[FOR_BODY_1]] ], [ [[SCEVGEP13:%.*]], [[LOOPEXIT]] ]
; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr addrspace(5) [[LSR_IV5]], align 8
; CHECK-NEXT: store ptr [[TMP0]], ptr [[LSR_IV1]], align 8
-; CHECK-NEXT: [[UGLYGEP2]] = getelementptr i8, ptr [[LSR_IV1]], i64 8
-; CHECK-NEXT: [[UGLYGEP6]] = getelementptr i8, ptr addrspace(5) [[LSR_IV5]], i32 8
+; CHECK-NEXT: [[SCEVGEP2]] = getelementptr i8, ptr [[LSR_IV1]], i64 8
+; CHECK-NEXT: [[SCEVGEP6]] = getelementptr i8, ptr addrspace(5) [[LSR_IV5]], i32 8
; CHECK-NEXT: br label [[FOR_BODY_1]]
; CHECK: for.body:
-; CHECK-NEXT: [[LSR_IV12:%.*]] = phi ptr [ [[UGLYGEP13]], [[FOR_BODY]] ], [ null, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[LSR_IV10:%.*]] = phi ptr addrspace(5) [ [[UGLYGEP11]], [[FOR_BODY]] ], [ null, [[ENTRY]] ]
-; CHECK-NEXT: [[UGLYGEP11]] = getelementptr i8, ptr addrspace(5) [[LSR_IV10]], i32 64
-; CHECK-NEXT: [[UGLYGEP13]] = getelementptr i8, ptr [[LSR_IV12]], i64 64
+; CHECK-NEXT: [[LSR_IV12:%.*]] = phi ptr [ [[SCEVGEP13]], [[FOR_BODY]] ], [ null, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[LSR_IV10:%.*]] = phi ptr addrspace(5) [ [[SCEVGEP11]], [[FOR_BODY]] ], [ null, [[ENTRY]] ]
+; CHECK-NEXT: [[SCEVGEP11]] = getelementptr i8, ptr addrspace(5) [[LSR_IV10]], i32 64
+; CHECK-NEXT: [[SCEVGEP13]] = getelementptr i8, ptr [[LSR_IV12]], i64 64
; CHECK-NEXT: br i1 false, label [[LOOPEXIT]], label [[FOR_BODY]]
;
entry:
@@ -64,21 +64,21 @@ define protected amdgpu_kernel void @baseregtest(i32 %n, i32 %lda) local_unnamed
; CHECK: if.end:
; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @foo()
; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[TMP0]], 3
-; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, ptr addrspace(3) @gVar, i32 [[TMP1]]
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr addrspace(3) @gVar, i32 [[TMP1]]
; CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[N:%.*]], 3
; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[TMP0]] to i64
; CHECK-NEXT: [[TMP4:%.*]] = shl nsw i64 [[TMP3]], 3
-; CHECK-NEXT: [[UGLYGEP2:%.*]] = getelementptr i8, ptr addrspace(1) null, i64 [[TMP4]]
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr addrspace(1) null, i64 [[TMP4]]
; CHECK-NEXT: [[TMP5:%.*]] = sext i32 [[LDA:%.*]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = shl nsw i64 [[TMP5]], 3
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[LSR_IV3:%.*]] = phi ptr addrspace(1) [ [[UGLYGEP4:%.*]], [[FOR_BODY]] ], [ [[UGLYGEP2]], [[IF_END]] ]
-; CHECK-NEXT: [[LSR_IV:%.*]] = phi ptr addrspace(3) [ [[UGLYGEP1:%.*]], [[FOR_BODY]] ], [ [[UGLYGEP]], [[IF_END]] ]
+; CHECK-NEXT: [[LSR_IV3:%.*]] = phi ptr addrspace(1) [ [[SCEVGEP4:%.*]], [[FOR_BODY]] ], [ [[SCEVGEP2]], [[IF_END]] ]
+; CHECK-NEXT: [[LSR_IV:%.*]] = phi ptr addrspace(3) [ [[SCEVGEP1:%.*]], [[FOR_BODY]] ], [ [[SCEVGEP]], [[IF_END]] ]
; CHECK-NEXT: [[TMP7:%.*]] = load double, ptr addrspace(1) [[LSR_IV3]], align 8
; CHECK-NEXT: store double [[TMP7]], ptr addrspace(3) [[LSR_IV]], align 8
-; CHECK-NEXT: [[UGLYGEP1]] = getelementptr i8, ptr addrspace(3) [[LSR_IV]], i32 [[TMP2]]
-; CHECK-NEXT: [[UGLYGEP4]] = getelementptr i8, ptr addrspace(1) [[LSR_IV3]], i64 [[TMP6]]
+; CHECK-NEXT: [[SCEVGEP1]] = getelementptr i8, ptr addrspace(3) [[LSR_IV]], i32 [[TMP2]]
+; CHECK-NEXT: [[SCEVGEP4]] = getelementptr i8, ptr addrspace(1) [[LSR_IV3]], i64 [[TMP6]]
; CHECK-NEXT: br label [[FOR_BODY]]
; CHECK: exit:
; CHECK-NEXT: ret void
diff --git a/llvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll
index b41e379bb63bc..f220103eca104 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll
@@ -20,8 +20,8 @@ define void @test(ptr %ioptr, i32 %X, ptr %start, ptr %end) {
; CHECK: for.body37:
; CHECK-NEXT: [[P0R_0335:%.*]] = phi ptr [ [[ADD_PTR94:%.*]], [[FOR_BODY37]] ], [ [[START:%.*]], [[FOR_BODY15]] ]
; CHECK-NEXT: [[ADD_PTR94]] = getelementptr inbounds double, ptr [[P0R_0335]], i64 1
-; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, ptr [[P0R_0335]], i64 [[TMP1]]
-; CHECK-NEXT: [[F1I_0:%.*]] = load double, ptr [[UGLYGEP]], align 8
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[P0R_0335]], i64 [[TMP1]]
+; CHECK-NEXT: [[F1I_0:%.*]] = load double, ptr [[SCEVGEP]], align 8
; CHECK-NEXT: call void @use(double [[F1I_0]])
; CHECK-NEXT: [[EC0:%.*]] = icmp eq ptr [[ADD_PTR94]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC0]], label [[FOR_BODY37]], label [[FOR_END_LOOPEXIT:%.*]]
diff --git a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
index cec71e0c87e75..e8201fc12f24a 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
@@ -18,33 +18,33 @@ define void @_Z15IntegerToStringjjR7Vector2(i32 %i, i32 %radix, %struct.Vector2*
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds [33 x i16], [33 x i16]* [[BUFFER]], i64 0, i64 33
; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint i16* [[ADD_PTR]] to i64
; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint i16* [[ADD_PTR]] to i64
-; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr [33 x i16], [33 x i16]* [[BUFFER]], i64 0, i64 32
-; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i16* [[SCEVGEP4]] to [33 x i16]*
-; CHECK-NEXT: [[SCEVGEP11:%.*]] = getelementptr [33 x i16], [33 x i16]* [[BUFFER]], i64 1, i64 0
-; CHECK-NEXT: [[SCEVGEP1112:%.*]] = bitcast i16* [[SCEVGEP11]] to [33 x i16]*
+; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr [33 x i16], [33 x i16]* [[BUFFER]], i64 0, i64 32
+; CHECK-NEXT: [[SCEVGEP56:%.*]] = bitcast i16* [[SCEVGEP5]] to [33 x i16]*
+; CHECK-NEXT: [[SCEVGEP12:%.*]] = getelementptr [33 x i16], [33 x i16]* [[BUFFER]], i64 1, i64 0
+; CHECK-NEXT: [[SCEVGEP1213:%.*]] = bitcast i16* [[SCEVGEP12]] to [33 x i16]*
; CHECK-NEXT: br label [[DO_BODY:%.*]]
; CHECK: do.body:
-; CHECK-NEXT: [[LSR_IV15:%.*]] = phi i64 [ [[LSR_IV_NEXT16:%.*]], [[DO_BODY]] ], [ -1, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[LSR_IV13:%.*]] = phi [33 x i16]* [ [[TMP2:%.*]], [[DO_BODY]] ], [ [[SCEVGEP1112]], [[ENTRY]] ]
-; CHECK-NEXT: [[LSR_IV6:%.*]] = phi [33 x i16]* [ [[TMP1:%.*]], [[DO_BODY]] ], [ [[SCEVGEP45]], [[ENTRY]] ]
+; CHECK-NEXT: [[LSR_IV16:%.*]] = phi i64 [ [[LSR_IV_NEXT17:%.*]], [[DO_BODY]] ], [ -1, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[LSR_IV14:%.*]] = phi [33 x i16]* [ [[TMP2:%.*]], [[DO_BODY]] ], [ [[SCEVGEP1213]], [[ENTRY]] ]
+; CHECK-NEXT: [[LSR_IV7:%.*]] = phi [33 x i16]* [ [[TMP1:%.*]], [[DO_BODY]] ], [ [[SCEVGEP56]], [[ENTRY]] ]
; CHECK-NEXT: [[I_ADDR_0:%.*]] = phi i32 [ [[DIV:%.*]], [[DO_BODY]] ], [ [[I:%.*]], [[ENTRY]] ]
-; CHECK-NEXT: [[LSR_IV617:%.*]] = bitcast [33 x i16]* [[LSR_IV6]] to i16*
+; CHECK-NEXT: [[LSR_IV718:%.*]] = bitcast [33 x i16]* [[LSR_IV7]] to i16*
; CHECK-NEXT: [[REM:%.*]] = urem i32 [[I_ADDR_0]], 10
; CHECK-NEXT: [[DIV]] = udiv i32 [[I_ADDR_0]], 10
; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[REM]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [37 x i8], [37 x i8]* @.str, i64 0, i64 [[IDXPROM]]
-; CHECK-NEXT: [[TMP5:%.*]] = load i8, i8* [[ARRAYIDX]], align 1
-; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP5]] to i16
-; CHECK-NEXT: store i16 [[CONV]], i16* [[LSR_IV617]], align 2
+; CHECK-NEXT: [[INST5:%.*]] = load i8, i8* [[ARRAYIDX]], align 1
+; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[INST5]] to i16
+; CHECK-NEXT: store i16 [[CONV]], i16* [[LSR_IV718]], align 2
; CHECK-NEXT: [[TMP0:%.*]] = icmp ugt i32 [[I_ADDR_0]], 9
-; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr [33 x i16], [33 x i16]* [[LSR_IV6]], i64 0, i64 -1
-; CHECK-NEXT: [[TMP1]] = bitcast i16* [[SCEVGEP7]] to [33 x i16]*
-; CHECK-NEXT: [[SCEVGEP14:%.*]] = getelementptr [33 x i16], [33 x i16]* [[LSR_IV13]], i64 0, i64 -1
-; CHECK-NEXT: [[TMP2]] = bitcast i16* [[SCEVGEP14]] to [33 x i16]*
-; CHECK-NEXT: [[LSR_IV_NEXT16]] = add i64 [[LSR_IV15]], 1
+; CHECK-NEXT: [[SCEVGEP8:%.*]] = getelementptr [33 x i16], [33 x i16]* [[LSR_IV7]], i64 0, i64 -1
+; CHECK-NEXT: [[TMP1]] = bitcast i16* [[SCEVGEP8]] to [33 x i16]*
+; CHECK-NEXT: [[SCEVGEP15:%.*]] = getelementptr [33 x i16], [33 x i16]* [[LSR_IV14]], i64 0, i64 -1
+; CHECK-NEXT: [[TMP2]] = bitcast i16* [[SCEVGEP15]] to [33 x i16]*
+; CHECK-NEXT: [[LSR_IV_NEXT17]] = add i64 [[LSR_IV16]], 1
; CHECK-NEXT: br i1 [[TMP0]], label [[DO_BODY]], label [[DO_END:%.*]]
; CHECK: do.end:
-; CHECK-NEXT: [[XAP_0:%.*]] = inttoptr i64 [[LSR_IV_NEXT16]] to i1*
+; CHECK-NEXT: [[XAP_0:%.*]] = inttoptr i64 [[LSR_IV_NEXT17]] to i1*
; CHECK-NEXT: [[CAP_0:%.*]] = ptrtoint i1* [[XAP_0]] to i64
; CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
; CHECK-NEXT: [[SUB_PTR_DIV39:%.*]] = lshr exact i64 [[SUB_PTR_SUB]], 1
@@ -54,32 +54,32 @@ define void @_Z15IntegerToStringjjR7Vector2(i32 %i, i32 %radix, %struct.Vector2*
; CHECK-NEXT: [[CMP2740:%.*]] = icmp eq i64 [[IDX_EXT21]], 0
; CHECK-NEXT: br i1 [[CMP2740]], label [[FOR_END:%.*]], label [[FOR_BODY_LR_PH:%.*]]
; CHECK: for.body.lr.ph:
-; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[MLENGTH]], align 4
+; CHECK-NEXT: [[INST16:%.*]] = load i32, i32* [[MLENGTH]], align 4
; CHECK-NEXT: [[MBEGIN:%.*]] = getelementptr inbounds [[STRUCT_VECTOR2]], %struct.Vector2* [[RESULT]], i64 0, i32 0
-; CHECK-NEXT: [[TMP14:%.*]] = load i16*, i16** [[MBEGIN]], align 8
-; CHECK-NEXT: [[TMP48:%.*]] = zext i32 [[TMP16]] to i64
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i16, i16* [[TMP14]], i64 [[TMP48]]
+; CHECK-NEXT: [[INST14:%.*]] = load i16*, i16** [[MBEGIN]], align 8
+; CHECK-NEXT: [[INST48:%.*]] = zext i32 [[INST16]] to i64
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i16, i16* [[INST14]], i64 [[INST48]]
; CHECK-NEXT: [[SCEVGEP1:%.*]] = bitcast i16* [[SCEVGEP]] to i8*
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[LSR_IV8:%.*]] = phi [33 x i16]* [ [[TMP3:%.*]], [[FOR_BODY]] ], [ [[TMP2]], [[FOR_BODY_LR_PH]] ]
+; CHECK-NEXT: [[LSR_IV9:%.*]] = phi [33 x i16]* [ [[TMP3:%.*]], [[FOR_BODY]] ], [ [[TMP2]], [[FOR_BODY_LR_PH]] ]
; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_LR_PH]] ]
-; CHECK-NEXT: [[LSR_IV810:%.*]] = bitcast [33 x i16]* [[LSR_IV8]] to i16*
-; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, i8* [[SCEVGEP1]], i64 [[LSR_IV]]
-; CHECK-NEXT: [[UGLYGEP2:%.*]] = bitcast i8* [[UGLYGEP]] to i16*
-; CHECK-NEXT: [[TMP29:%.*]] = load i16, i16* [[LSR_IV810]], align 2
-; CHECK-NEXT: store i16 [[TMP29]], i16* [[UGLYGEP2]], align 2
+; CHECK-NEXT: [[LSR_IV911:%.*]] = bitcast [33 x i16]* [[LSR_IV9]] to i16*
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, i8* [[SCEVGEP1]], i64 [[LSR_IV]]
+; CHECK-NEXT: [[SCEVGEP23:%.*]] = bitcast i8* [[SCEVGEP2]] to i16*
+; CHECK-NEXT: [[INST29:%.*]] = load i16, i16* [[LSR_IV911]], align 2
+; CHECK-NEXT: store i16 [[INST29]], i16* [[SCEVGEP23]], align 2
; CHECK-NEXT: [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 2
-; CHECK-NEXT: [[LSR_IV_NEXT3:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i16*
-; CHECK-NEXT: [[SCEVGEP9:%.*]] = getelementptr [33 x i16], [33 x i16]* [[LSR_IV8]], i64 0, i64 1
-; CHECK-NEXT: [[TMP3]] = bitcast i16* [[SCEVGEP9]] to [33 x i16]*
-; CHECK-NEXT: [[CMP27:%.*]] = icmp eq i16* [[LSR_IV_NEXT3]], null
+; CHECK-NEXT: [[LSR_IV_NEXT4:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i16*
+; CHECK-NEXT: [[SCEVGEP10:%.*]] = getelementptr [33 x i16], [33 x i16]* [[LSR_IV9]], i64 0, i64 1
+; CHECK-NEXT: [[TMP3]] = bitcast i16* [[SCEVGEP10]] to [33 x i16]*
+; CHECK-NEXT: [[CMP27:%.*]] = icmp eq i16* [[LSR_IV_NEXT4]], null
; CHECK-NEXT: br i1 [[CMP27]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY]]
; CHECK: for.end.loopexit:
; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
-; CHECK-NEXT: [[TMP38:%.*]] = load i32, i32* [[MLENGTH]], align 4
-; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP38]], [[CONV11]]
+; CHECK-NEXT: [[INST38:%.*]] = load i32, i32* [[MLENGTH]], align 4
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[INST38]], [[CONV11]]
; CHECK-NEXT: store i32 [[ADD]], i32* [[MLENGTH]], align 4
; CHECK-NEXT: ret void
;
@@ -93,14 +93,14 @@ entry:
do.body: ; preds = %do.body, %entry
%0 = phi i64 [ %indvar.next44, %do.body ], [ 0, %entry ]
%i.addr.0 = phi i32 [ %div, %do.body ], [ %i, %entry ]
- %tmp51 = sub i64 32, %0
- %incdec.ptr = getelementptr [33 x i16], [33 x i16]* %buffer, i64 0, i64 %tmp51
+ %inst51 = sub i64 32, %0
+ %incdec.ptr = getelementptr [33 x i16], [33 x i16]* %buffer, i64 0, i64 %inst51
%rem = urem i32 %i.addr.0, 10
%div = udiv i32 %i.addr.0, 10
%idxprom = zext i32 %rem to i64
%arrayidx = getelementptr inbounds [37 x i8], [37 x i8]* @.str, i64 0, i64 %idxprom
- %tmp5 = load i8, i8* %arrayidx, align 1
- %conv = sext i8 %tmp5 to i16
+ %inst5 = load i8, i8* %arrayidx, align 1
+ %conv = sext i8 %inst5 to i16
store i16 %conv, i16* %incdec.ptr, align 2
%1 = icmp ugt i32 %i.addr.0, 9
%indvar.next44 = add i64 %0, 1
@@ -121,22 +121,22 @@ do.end: ; preds = %do.body
br i1 %cmp2740, label %for.end, label %for.body.lr.ph
for.body.lr.ph: ; preds = %do.end
- %tmp16 = load i32, i32* %mLength, align 4
+ %inst16 = load i32, i32* %mLength, align 4
%mBegin = getelementptr inbounds %struct.Vector2, %struct.Vector2* %result, i64 0, i32 0
- %tmp14 = load i16*, i16** %mBegin, align 8
- %tmp48 = zext i32 %tmp16 to i64
+ %inst14 = load i16*, i16** %mBegin, align 8
+ %inst48 = zext i32 %inst16 to i64
br label %for.body
for.body: ; preds = %for.body, %for.body.lr.ph
%indvar = phi i64 [ 0, %for.body.lr.ph ], [ %indvar.next, %for.body ]
- %tmp46 = add i64 %tmp51, %indvar
- %p.042 = getelementptr [33 x i16], [33 x i16]* %buffer, i64 0, i64 %tmp46
- %tmp47 = sub i64 %indvar, %0
- %incdec.ptr32 = getelementptr [33 x i16], [33 x i16]* %buffer, i64 1, i64 %tmp47
- %tmp49 = add i64 %tmp48, %indvar
- %dst.041 = getelementptr i16, i16* %tmp14, i64 %tmp49
- %tmp29 = load i16, i16* %p.042, align 2
- store i16 %tmp29, i16* %dst.041, align 2
+ %inst46 = add i64 %inst51, %indvar
+ %p.042 = getelementptr [33 x i16], [33 x i16]* %buffer, i64 0, i64 %inst46
+ %inst47 = sub i64 %indvar, %0
+ %incdec.ptr32 = getelementptr [33 x i16], [33 x i16]* %buffer, i64 1, i64 %inst47
+ %inst49 = add i64 %inst48, %indvar
+ %dst.041 = getelementptr i16, i16* %inst14, i64 %inst49
+ %inst29 = load i16, i16* %p.042, align 2
+ store i16 %inst29, i16* %dst.041, align 2
%cmp27 = icmp eq i16* %incdec.ptr32, %add.ptr22
%indvar.next = add i64 %indvar, 1
br i1 %cmp27, label %for.end.loopexit, label %for.body
@@ -145,8 +145,8 @@ for.end.loopexit: ; preds = %for.body
br label %for.end
for.end: ; preds = %for.end.loopexit, %do.end
- %tmp38 = load i32, i32* %mLength, align 4
- %add = add i32 %tmp38, %conv11
+ %inst38 = load i32, i32* %mLength, align 4
+ %add = add i32 %inst38, %conv11
store i32 %add, i32* %mLength, align 4
ret void
}
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