[llvm] ec294d2 - [X86] LowerVectorAllZero - lower to CMP(MOVMSK(NOT(X)),0) instead of CMP(MOVMSK(X),65535)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 23 09:10:50 PDT 2023
Author: Simon Pilgrim
Date: 2023-03-23T16:10:37Z
New Revision: ec294d2f8f1839e11c13ee32279cd28c1f46f66f
URL: https://github.com/llvm/llvm-project/commit/ec294d2f8f1839e11c13ee32279cd28c1f46f66f
DIFF: https://github.com/llvm/llvm-project/commit/ec294d2f8f1839e11c13ee32279cd28c1f46f66f.diff
LOG: [X86] LowerVectorAllZero - lower to CMP(MOVMSK(NOT(X)),0) instead of CMP(MOVMSK(X),65535)
In most cases the NOT will still be scalarized, but it allows us to perform the CMP(X,0) combines inside combineCMP()
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/pr45378.ll
llvm/test/CodeGen/X86/ptest.ll
llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 2d371566381c..3a4173e44379 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24224,9 +24224,10 @@ static SDValue LowerVectorAllZero(const SDLoc &DL, SDValue V, ISD::CondCode CC,
V = DAG.getBitcast(MVT::v16i8, MaskBits(V));
V = DAG.getNode(X86ISD::PCMPEQ, DL, MVT::v16i8, V,
getZeroVector(MVT::v16i8, Subtarget, DAG, DL));
+ V = DAG.getNOT(DL, V, MVT::v16i8);
V = DAG.getNode(X86ISD::MOVMSK, DL, MVT::i32, V);
return DAG.getNode(X86ISD::CMP, DL, MVT::i32, V,
- DAG.getConstant(0xFFFF, DL, MVT::i32));
+ DAG.getConstant(0, DL, MVT::i32));
}
// Check whether an OR'd reduction tree is PTEST-able, or if we can fallback to
diff --git a/llvm/test/CodeGen/X86/pr45378.ll b/llvm/test/CodeGen/X86/pr45378.ll
index fecfa95f8b83..aa870b7afbd3 100644
--- a/llvm/test/CodeGen/X86/pr45378.ll
+++ b/llvm/test/CodeGen/X86/pr45378.ll
@@ -15,7 +15,7 @@ define i1 @parseHeaders(ptr %ptr) nounwind {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -45,7 +45,7 @@ define i1 @parseHeaders2_scalar_or(ptr %ptr) nounwind {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/ptest.ll b/llvm/test/CodeGen/X86/ptest.ll
index bedcfebc5f6e..5983d502af3d 100644
--- a/llvm/test/CodeGen/X86/ptest.ll
+++ b/llvm/test/CodeGen/X86/ptest.ll
@@ -10,7 +10,7 @@ define i32 @veccond128(<4 x i32> %input) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: je .LBB0_2
; SSE2-NEXT: # %bb.1: # %if-true-block
; SSE2-NEXT: xorl %eax, %eax
@@ -57,7 +57,7 @@ define i32 @veccond256(<8 x i32> %input) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: je .LBB1_2
; SSE2-NEXT: # %bb.1: # %if-true-block
; SSE2-NEXT: xorl %eax, %eax
@@ -109,7 +109,7 @@ define i32 @veccond512(<16 x i32> %input) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: je .LBB2_2
; SSE2-NEXT: # %bb.1: # %if-true-block
; SSE2-NEXT: xorl %eax, %eax
@@ -176,7 +176,7 @@ define i32 @vectest128(<4 x i32> %input) {
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %ecx
; SSE2-NEXT: xorl %eax, %eax
-; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -207,7 +207,7 @@ define i32 @vectest256(<8 x i32> %input) {
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %ecx
; SSE2-NEXT: xorl %eax, %eax
-; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -242,7 +242,7 @@ define i32 @vectest512(<16 x i32> %input) {
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %ecx
; SSE2-NEXT: xorl %eax, %eax
-; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -286,7 +286,7 @@ define i32 @vecsel128(<4 x i32> %input, i32 %a, i32 %b) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %ecx
-; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
; SSE2-NEXT: cmovel %esi, %eax
; SSE2-NEXT: retq
;
@@ -317,7 +317,7 @@ define i32 @vecsel256(<8 x i32> %input, i32 %a, i32 %b) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %ecx
-; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
; SSE2-NEXT: cmovel %esi, %eax
; SSE2-NEXT: retq
;
@@ -352,7 +352,7 @@ define i32 @vecsel512(<16 x i32> %input, i32 %a, i32 %b) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %ecx
-; SSE2-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
; SSE2-NEXT: cmovel %esi, %eax
; SSE2-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll b/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
index a489a5e6099f..761ad105f75d 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
@@ -16,7 +16,7 @@ define i1 @test_v2i64(<2 x i64> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -43,7 +43,7 @@ define i1 @test_v4i64(<4 x i64> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -74,7 +74,7 @@ define i1 @test_v8i64(<8 x i64> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -128,7 +128,7 @@ define i1 @test_v16i64(<16 x i64> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -207,7 +207,7 @@ define i1 @test_v4i32(<4 x i32> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -234,7 +234,7 @@ define i1 @test_v8i32(<8 x i32> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -265,7 +265,7 @@ define i1 @test_v16i32(<16 x i32> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -319,7 +319,7 @@ define i1 @test_v32i32(<32 x i32> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -417,7 +417,7 @@ define i1 @test_v8i16(<8 x i16> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -444,7 +444,7 @@ define i1 @test_v16i16(<16 x i16> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -475,7 +475,7 @@ define i1 @test_v32i16(<32 x i16> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -529,7 +529,7 @@ define i1 @test_v64i16(<64 x i16> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -646,7 +646,7 @@ define i1 @test_v16i8(<16 x i8> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -673,7 +673,7 @@ define i1 @test_v32i8(<32 x i8> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -704,7 +704,7 @@ define i1 @test_v64i8(<64 x i8> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -758,7 +758,7 @@ define i1 @test_v128i8(<128 x i8> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -866,7 +866,7 @@ define i1 @mask_v8i32(<8 x i32> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -913,7 +913,7 @@ define i1 @trunc_v16i16(<16 x i16> %a0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -964,8 +964,7 @@ define i1 @mask_v128i8(<128 x i8> %a0) {
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: psllw $7, %xmm0
; SSE2-NEXT: pmovmskb %xmm0, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: testl %eax, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -1026,7 +1025,7 @@ define zeroext i1 @PR44781(ptr %0) {
; SSE2-NEXT: pxor %xmm1, %xmm1
; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
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