[PATCH] D146441: [APFloat] Add E4M3B11FNUZ

David Majnemer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 20 10:23:53 PDT 2023


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X. Sun et al. (https://dl.acm.org/doi/10.5555/3454287.3454728) published
a paper showing that an FP format with 4 bits of exponent, 3 bits of
significand and an exponent bias of 11 would work quite well for ML
applications.

Google hardware supports a variant of this format where 0x80 is used to
represent NaN, as in the Float8E4M3FNUZ format. Just like the
Float8E4M3FNUZ format, this format does not support -0 and values which
would map to it will become +0.

This format is proposed for inclusion in OpenXLA's StableHLO dialect: https://github.com/openxla/stablehlo/pull/1308

As part of inclusion in that dialect, APFloat needs to know how to
handle this format.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D146441

Files:
  clang/lib/AST/MicrosoftMangle.cpp
  llvm/include/llvm/ADT/APFloat.h
  llvm/lib/Support/APFloat.cpp
  llvm/unittests/ADT/APFloatTest.cpp
  mlir/include/mlir-c/BuiltinTypes.h
  mlir/include/mlir/IR/Builders.h
  mlir/include/mlir/IR/BuiltinTypes.h
  mlir/include/mlir/IR/BuiltinTypes.td
  mlir/include/mlir/IR/OpBase.td
  mlir/include/mlir/IR/Types.h
  mlir/lib/AsmParser/TokenKinds.def
  mlir/lib/AsmParser/TypeParser.cpp
  mlir/lib/Bindings/Python/IRTypes.cpp
  mlir/lib/CAPI/IR/BuiltinTypes.cpp
  mlir/lib/IR/AsmPrinter.cpp
  mlir/lib/IR/Builders.cpp
  mlir/lib/IR/BuiltinTypes.cpp
  mlir/lib/IR/MLIRContext.cpp
  mlir/lib/IR/Types.cpp
  mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
  mlir/test/IR/attribute.mlir
  mlir/test/python/ir/builtin_types.py
  mlir/utils/lldb-scripts/mlirDataFormatters.py

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