[PATCH] D143134: [AMDGPU][SDAG] attempt to custom legalize uaddo/usubo for long operands

[Vikram Hegde via Phabricator via llvm-commits]

vikramRH created this revision.
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The goal here was to eliminate the redundant compare instruction generated in addition to add/sub2. Tries to address the issue discussed here, https://github.com/RadeonOpenCompute/ROCm/issues/477

Im having to modify the instruction selection for uniform addcarry/subcarry node when one of the carry users have already been selected to VALU to avoid suboptimal pattern. I have some concerns here and would like to know if it could be done in a better way.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D143134

Files:
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.h
  llvm/test/CodeGen/AMDGPU/carryout-selection.ll
  llvm/test/CodeGen/AMDGPU/sdiv64.ll
  llvm/test/CodeGen/AMDGPU/srem64.ll
  llvm/test/CodeGen/AMDGPU/uaddo.ll
  llvm/test/CodeGen/AMDGPU/uaddsat.ll
  llvm/test/CodeGen/AMDGPU/udiv64.ll
  llvm/test/CodeGen/AMDGPU/urem64.ll
  llvm/test/CodeGen/AMDGPU/usubo.ll
  llvm/test/CodeGen/AMDGPU/usubsat.ll

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