[PATCH] D140569: [AVR] Custom lower 32-bit shift instructions

[Ayke via Phabricator via llvm-commits]

aykevl created this revision.
aykevl added reviewers: dylanmckay, benshi001.
Herald added subscribers: Jim, hiraditya.
Herald added a project: All.
aykevl requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

32-bit shift instructions were previously expanded using the default
SelectionDAG expander, which meant it used 16-bit constant shifts and
ORed them together. This works, but is far from optimal.

I've optimized 32-bit shifts on AVR using a custom inserter. This is
done using three new pseudo-instructions that take the upper and lower
bits of the value in two separate 16-bit registers and outputs two
16-bit registers.

This is the first commit in a series. When completed, shift instructions
will take around 31% less instructions on average for constant 32-bit
shifts, and is in all cases equal or better than the old behavior. It
also tends to match or outperform avr-gcc: the only cases where avr-gcc
does better is when it uses a loop to shift, or when the LLVM register
allocator inserts some unnecessary movs. But it even outperforms avr-gcc
in some cases where avr-gcc does not use a loop.

As a side effect, non-constant 32-bit shifts also become more efficient.

For some real-world differences: the build of compiler-rt I use in
TinyGo becomes 2.7% smaller and the build of picolibc I use becomes 0.9%
smaller. I think picolibc is a better representation of real-world code,
but even a ~1% reduction in code size is really significant.

The current patch just lays the groundwork. The result is actually a
regression in code size. Later patches will use this as a basis to
optimize these shift instructions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D140569

Files:
  llvm/lib/Target/AVR/AVRISelLowering.cpp
  llvm/lib/Target/AVR/AVRISelLowering.h
  llvm/lib/Target/AVR/AVRInstrInfo.td
  llvm/test/CodeGen/AVR/avr-rust-issue-123.ll
  llvm/test/CodeGen/AVR/div.ll
  llvm/test/CodeGen/AVR/rem.ll
  llvm/test/CodeGen/AVR/return.ll
  llvm/test/CodeGen/AVR/shift32.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D140569.484901.patch
Type: text/x-patch
Size: 19824 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20221222/b1db4d52/attachment-0001.bin>