[llvm] 41f5bbe - [AArch64][Windows] Check sret attribute also for inreg attribute

[via llvm-commits]

Author: chenglin.bi
Date: 2022-10-12T09:58:50+08:00
New Revision: 41f5bbe18b5b162fe798b933deecc55f7cc29b92

URL: https://github.com/llvm/llvm-project/commit/41f5bbe18b5b162fe798b933deecc55f7cc29b92
DIFF: https://github.com/llvm/llvm-project/commit/41f5bbe18b5b162fe798b933deecc55f7cc29b92.diff

LOG: [AArch64][Windows] Check sret attribute also for inreg attribute

Fix the issue: #57684

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D135512

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    llvm/test/CodeGen/AArch64/arm64-windows-calls.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index b3db12ee3238b..e9a181a7b0109 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -6313,7 +6313,7 @@ SDValue AArch64TargetLowering::LowerFormalArguments(
   // epilogue.
   if (IsWin64) {
     for (unsigned I = 0, E = Ins.size(); I != E; ++I) {
-      if (Ins[I].Flags.isInReg()) {
+      if (Ins[I].Flags.isInReg() && Ins[I].Flags.isSRet()) {
         assert(!FuncInfo->getSRetReturnReg());
 
         MVT PtrTy = getPointerTy(DAG.getDataLayout());

diff  --git a/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll b/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
index 01626333f16d7..e12e2c91a0e45 100644
--- a/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
@@ -176,3 +176,15 @@ define void @call_copy_notpod() {
   ; CHECK: bl copy_notpod
   ; CHECK-NEXT: stp x0, x1, [{{.*}}]
 }
+
+; We shouldn't return the argument
+; when it has only inreg attribute
+define i64 @foobar(i64* inreg %0) {
+; CHECK-LABEL: foobar:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    ldr x0, [x0]
+; CHECK-NEXT:    ret
+entry:
+  %1 = load i64, i64* %0
+  ret i64 %1
+}