[llvm] 3fe7180 - Introduce predicate for a atomic operations in GMIR

Yashwant Singh via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 22 23:05:00 PDT 2022


Author: Yashwant Singh
Date: 2022-09-23T11:34:36+05:30
New Revision: 3fe71809a5d666385575358b579aae2b8a96dd07

URL: https://github.com/llvm/llvm-project/commit/3fe71809a5d666385575358b579aae2b8a96dd07
DIFF: https://github.com/llvm/llvm-project/commit/3fe71809a5d666385575358b579aae2b8a96dd07.diff

LOG: Introduce predicate for a atomic operations in GMIR

Reviewed By: arsenm, sameerds

Differential Revision: https://reviews.llvm.org/D134266

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/TargetInstrInfo.h
    llvm/include/llvm/Support/TargetOpcodes.def

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index 65fba772c0c88..02eaf93f350e2 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -110,6 +110,11 @@ class TargetInstrInfo : public MCInstrInfo {
     return Opc <= TargetOpcode::GENERIC_OP_END;
   }
 
+  static bool isGenericAtomicRMWOpcode(unsigned Opc) {
+    return Opc >= TargetOpcode::GENERIC_ATOMICRMW_OP_START &&
+           Opc <= TargetOpcode::GENERIC_ATOMICRMW_OP_END;
+  }
+
   /// Given a machine instruction descriptor, returns the register
   /// class constraint for OpNum, or NULL.
   virtual

diff  --git a/llvm/include/llvm/Support/TargetOpcodes.def b/llvm/include/llvm/Support/TargetOpcodes.def
index 5d6be0fe655e6..52da5659e8058 100644
--- a/llvm/include/llvm/Support/TargetOpcodes.def
+++ b/llvm/include/llvm/Support/TargetOpcodes.def
@@ -387,6 +387,12 @@ HANDLE_TARGET_OPCODE(G_ATOMICRMW_FSUB)
 HANDLE_TARGET_OPCODE(G_ATOMICRMW_FMAX)
 HANDLE_TARGET_OPCODE(G_ATOMICRMW_FMIN)
 
+// Marker for start of Generic AtomicRMW opcodes
+HANDLE_TARGET_OPCODE_MARKER(GENERIC_ATOMICRMW_OP_START, G_ATOMICRMW_XCHG)
+
+// Marker for end of Generic AtomicRMW opcodes
+HANDLE_TARGET_OPCODE_MARKER(GENERIC_ATOMICRMW_OP_END, G_ATOMICRMW_FMIN)
+
 // Generic atomic fence
 HANDLE_TARGET_OPCODE(G_FENCE)
 


        


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