[PATCH] D132559: [AArch64] Add support for 128-bit non temporal loads.

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

My understanding is that the !nontemporal metadata is a hint to the backend that the load data will not be reused so caching it is unlikely to be useful for performance. It isn't a mandate. Similarly the ldnp pairwise loads are a hint to the microarchitecture that the loaded data is likely not going to be reused so doesn't need caching. The micro-architecture is free to ignore the hint again.
With that, is it beneficial to force uses of 128bit non-temperoral loads if it leads to more instructions overall? For i256 it was almost certainly a good thing to do, but for i128 it sounds like it might end up slowing things down more than it helps. I'm not sure where the balance point lies.


Repository:
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  https://reviews.llvm.org/D132559/new/

https://reviews.llvm.org/D132559