[llvm] 58ea245 - [Instcombine] Add some value tracking tests for cases where the conditional branch feeding a phi gives us known bits of the value based off the branch condition
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 13 05:03:16 PDT 2022
Author: Simon Pilgrim
Date: 2022-08-13T13:00:52+01:00
New Revision: 58ea2454aa7d7cd9fac8832cf00b5b052586e639
URL: https://github.com/llvm/llvm-project/commit/58ea2454aa7d7cd9fac8832cf00b5b052586e639
DIFF: https://github.com/llvm/llvm-project/commit/58ea2454aa7d7cd9fac8832cf00b5b052586e639.diff
LOG: [Instcombine] Add some value tracking tests for cases where the conditional branch feeding a phi gives us known bits of the value based off the branch condition
Part of Issue #37628
Added:
llvm/test/Transforms/InstCombine/known-phi-br.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/known-phi-br.ll b/llvm/test/Transforms/InstCombine/known-phi-br.ll
new file mode 100644
index 0000000000000..a3079860b62e3
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/known-phi-br.ll
@@ -0,0 +1,157 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -passes=instcombine < %s | FileCheck %s
+
+;
+; Tests to show cases where computeKnownBits should be able to determine
+; the known bits of a phi edge based off a conditional branch feeding the phi.
+;
+
+; TODO: %x either eq 7 or is set to 7
+define i64 @limit_i64_eq_7(i64 %x) {
+; CHECK-LABEL: @limit_i64_eq_7(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[X:%.*]], 7
+; CHECK-NEXT: br i1 [[CMP]], label [[END:%.*]], label [[BODY:%.*]]
+; CHECK: body:
+; CHECK-NEXT: br label [[END]]
+; CHECK: end:
+; CHECK-NEXT: [[RES:%.*]] = phi i64 [ [[X]], [[ENTRY:%.*]] ], [ 7, [[BODY]] ]
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ %cmp = icmp eq i64 %x, 7
+ br i1 %cmp, label %end, label %body
+body:
+ br label %end
+end:
+ %res = phi i64 [ %x, %entry ], [ 7, %body ]
+ ret i64 %res
+}
+
+; TODO: %x either eq 255 or is set to 255
+define i64 @limit_i64_ne_255(i64 %x) {
+; CHECK-LABEL: @limit_i64_ne_255(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i64 [[X:%.*]], 255
+; CHECK-NEXT: br i1 [[CMP_NOT]], label [[END:%.*]], label [[BODY:%.*]]
+; CHECK: body:
+; CHECK-NEXT: br label [[END]]
+; CHECK: end:
+; CHECK-NEXT: [[RES:%.*]] = phi i64 [ [[X]], [[ENTRY:%.*]] ], [ 255, [[BODY]] ]
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ %cmp = icmp ne i64 %x, 255
+ br i1 %cmp, label %body, label %end
+body:
+ br label %end
+end:
+ %res = phi i64 [ %x, %entry ], [ 255, %body ]
+ ret i64 %res
+}
+
+; TODO: %x either ule 15 or is masked with 15
+define i64 @limit_i64_ule_15(i64 %x) {
+; CHECK-LABEL: @limit_i64_ule_15(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[X:%.*]], 16
+; CHECK-NEXT: br i1 [[CMP]], label [[END:%.*]], label [[BODY:%.*]]
+; CHECK: body:
+; CHECK-NEXT: [[MASK:%.*]] = and i64 [[X]], 15
+; CHECK-NEXT: br label [[END]]
+; CHECK: end:
+; CHECK-NEXT: [[X_MASK:%.*]] = phi i64 [ [[X]], [[ENTRY:%.*]] ], [ [[MASK]], [[BODY]] ]
+; CHECK-NEXT: [[RES:%.*]] = and i64 [[X_MASK]], 15
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ %cmp = icmp ule i64 %x, 15
+ br i1 %cmp, label %end, label %body
+body:
+ %mask = and i64 %x, 15
+ br label %end
+end:
+ %x.mask = phi i64 [ %x, %entry ], [ %mask, %body ]
+ %res = and i64 %x.mask, 15
+ ret i64 %res
+}
+
+; TODO: %x either uge 7 or is masked with 7
+define i64 @limit_i64_uge_7(i64 %x) {
+; CHECK-LABEL: @limit_i64_uge_7(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[X:%.*]], 6
+; CHECK-NEXT: br i1 [[CMP]], label [[BODY:%.*]], label [[END:%.*]]
+; CHECK: body:
+; CHECK-NEXT: [[MASK:%.*]] = and i64 [[X]], 7
+; CHECK-NEXT: br label [[END]]
+; CHECK: end:
+; CHECK-NEXT: [[X_MASK:%.*]] = phi i64 [ [[X]], [[ENTRY:%.*]] ], [ [[MASK]], [[BODY]] ]
+; CHECK-NEXT: [[RES:%.*]] = and i64 [[X_MASK]], 7
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ %cmp = icmp uge i64 %x, 7
+ br i1 %cmp, label %body, label %end
+body:
+ %mask = and i64 %x, 7
+ br label %end
+end:
+ %x.mask = phi i64 [ %x, %entry ], [ %mask, %body ]
+ %res = and i64 %x.mask, 7
+ ret i64 %res
+}
+
+; TODO: %x either ult 8 or is masked with 7
+define i64 @limit_i64_ult_8(i64 %x) {
+; CHECK-LABEL: @limit_i64_ult_8(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[X:%.*]], 8
+; CHECK-NEXT: br i1 [[CMP]], label [[END:%.*]], label [[BODY:%.*]]
+; CHECK: body:
+; CHECK-NEXT: [[MASK:%.*]] = and i64 [[X]], 7
+; CHECK-NEXT: br label [[END]]
+; CHECK: end:
+; CHECK-NEXT: [[X_MASK:%.*]] = phi i64 [ [[X]], [[ENTRY:%.*]] ], [ [[MASK]], [[BODY]] ]
+; CHECK-NEXT: [[RES:%.*]] = and i64 [[X_MASK]], 7
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ %cmp = icmp ult i64 %x, 8
+ br i1 %cmp, label %end, label %body
+body:
+ %mask = and i64 %x, 7
+ br label %end
+end:
+ %x.mask = phi i64 [ %x, %entry ], [ %mask, %body ]
+ %res = and i64 %x.mask, 7
+ ret i64 %res
+}
+
+; TODO: %x either ugt 8 or is masked with 7
+define i64 @limit_i64_ugt_8(i64 %x) {
+; CHECK-LABEL: @limit_i64_ugt_8(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[X:%.*]], 8
+; CHECK-NEXT: br i1 [[CMP]], label [[BODY:%.*]], label [[END:%.*]]
+; CHECK: body:
+; CHECK-NEXT: [[MASK:%.*]] = and i64 [[X]], 7
+; CHECK-NEXT: br label [[END]]
+; CHECK: end:
+; CHECK-NEXT: [[X_MASK:%.*]] = phi i64 [ [[X]], [[ENTRY:%.*]] ], [ [[MASK]], [[BODY]] ]
+; CHECK-NEXT: [[RES:%.*]] = and i64 [[X_MASK]], 7
+; CHECK-NEXT: ret i64 [[RES]]
+;
+entry:
+ %cmp = icmp ugt i64 %x, 8
+ br i1 %cmp, label %body, label %end
+body:
+ %mask = and i64 %x, 7
+ br label %end
+end:
+ %x.mask = phi i64 [ %x, %entry ], [ %mask, %body ]
+ %res = and i64 %x.mask, 7
+ ret i64 %res
+}
+
+
More information about the llvm-commits
mailing list