[PATCH] D128570: [ISel] Round down mask bit when merge undef(s) for DAG combine

Phoebe Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 28 00:08:51 PDT 2022


pengfei added inline comments.


================
Comment at: llvm/lib/Support/APInt.cpp:2996
   } else {
     // Merge bits - if any old bit is set, then set scale equivalent new bit.
     unsigned Scale = OldBitWidth / NewBitWidth;
----------------
Is the comment correct after your change?


================
Comment at: llvm/test/CodeGen/X86/splat-value.ll:20-23
+  %fshl = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %unmaskedload270, <8 x i64> %unmaskedload, <8 x i64> <i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12, i64 12>)
+  %res = shufflevector <8 x i64> %fshl, <8 x i64> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 10, i32 11, i32 12, i32 13, i32 6, i32 7>
+  store <8 x i64> %res, <8 x i64>* %arr, align 64
+  ret void
----------------
Where's `undef` in the test?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128570/new/

https://reviews.llvm.org/D128570



More information about the llvm-commits mailing list