[PATCH] D128005: [SelectionDAG] Don't apply MinRCSize constraint in InstrEmitter::AddRegisterOperand for IMPLICIT_DEF sources.

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 16 14:47:20 PDT 2022


reames added a comment.

In D128005#3590328 <https://reviews.llvm.org/D128005#3590328>, @arsenm wrote:

> I've never understood the point of this parameter

I went digging a bit, and as best I can tell this is a heuristic to avoid putting too much pressure on register allocation for virtual regs from small register classes.  The idea appears to be that using values copied into a bigger register class is likely to lead to overall better results.  As a guess, I think this is a workaround for the fact that we can't spill to other register classes.

For the implicit_def case, that heuristic makes no sense.  So LGTM by me too.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128005/new/

https://reviews.llvm.org/D128005



More information about the llvm-commits mailing list