[PATCH] D77804: [DAG] Enable ISD::SHL/SRL SimplifyMultipleUseDemandedBits handling (WIP)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun May 8 06:10:06 PDT 2022

Previous message: [llvm] 800d36c - [DAG] Only perform the fold (A-B)+(C-D) --> (A+C)-(B+D) when both inner subs have one use
Next message: [PATCH] D122918: [RISCV][CodeGen] Support float-arith in Zfinx
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

RKSimon planned changes to this revision.
RKSimon added a comment.

Waiting for D124839 <https://reviews.llvm.org/D124839> to land


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77804/new/

https://reviews.llvm.org/D77804

Previous message: [llvm] 800d36c - [DAG] Only perform the fold (A-B)+(C-D) --> (A+C)-(B+D) when both inner subs have one use
Next message: [PATCH] D122918: [RISCV][CodeGen] Support float-arith in Zfinx
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list