[PATCH] D123801: [DAG][PowerPC] Combine shuffle(bitcast(X), Mask) to bitcast(shuffle(X, Mask'))

ChenZheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 4 21:09:20 PDT 2022


shchenz added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9878
   const SDValue *InputLoad = getNormalLoadInput(V1, IsPermutedLoad);
-  if (InputLoad && Subtarget.hasVSX() && V2.isUndef() &&
-      (PPC::isSplatShuffleMask(SVOp, 4) || PPC::isSplatShuffleMask(SVOp, 8)) &&
+  auto isSplatShuffle = [](ShuffleVectorSDNode *SVOp) {
+    if (SVOp->getValueType(0).getVectorNumElements() == 2)
----------------
Can we integrate splat load check for 2 elements to `isSplatShuffleMask()` and `getSplatIdxForPPCMnemonics()`?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123801/new/

https://reviews.llvm.org/D123801



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