[PATCH] D123717: [DWARF][FIX] Handle the use of multiple registers gracefully

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 13 13:07:03 PDT 2022


arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=amdgcn-amd-amdhsa < %s | FileCheck %s
+
----------------
Should specify an -mcpu. Is it worth checking binary output too (maybe if this actually was handled?)


================
Comment at: llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll:109
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version 15.0.0 (https://github.com/llvm/llvm-project.git 05256c8d95e0b15bcc502d595c15d902ff520f97)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !44, imports: !45, splitDebugInlining: false, nameTableKind: None)
+!1 = !DIFile(filename: "dummy", directory: "dummy", checksumkind: CSK_MD5, checksum: "b67bec84bdce3730b4a6f2ed8d50b85c")
----------------
Can you try to cut this down some?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123717/new/

https://reviews.llvm.org/D123717



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