[PATCH] D122287: [XCOFF] support writing sections, relocations and symbols for XCOFF64.

Digger Lin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 29 09:27:16 PDT 2022


DiggerLin added inline comments.


================
Comment at: llvm/lib/MC/XCOFFObjectWriter.cpp:196
   uint64_t RelocationEntryOffset = 0;
+  StringRef SourceFileName = ".file";
 
----------------
 I do not think  we will change  ".file" .  change to const StringRef SourceFileName = ".file" ?


================
Comment at: llvm/lib/MC/XCOFFObjectWriter.cpp:751
   } else {
     W.write<int32_t>(SymbolTableEntryCount);
     W.write<uint16_t>(0); // AuxHeaderSize. No optional header for an object
----------------
SymbolTableEntryCount+1 for ".file" symbol.


================
Comment at: llvm/lib/MC/XCOFFObjectWriter.cpp:808-809
   }
-  W.write<uint32_t>(Reloc.SymbolTableIndex);
+  // TODO SymbolTable for XCOFF64 is not yet supported.
+  W.write<uint32_t>(is64Bit() ? 0 : Reloc.SymbolTableIndex);
   W.write<uint8_t>(Reloc.SignAndSize);
----------------
jhenderson wrote:
> I'd have thought implementing the symbol table before relocations makes more sense.
agree with James


================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp:82
+    case MCSymbolRefExpr::VK_None:
+      return {XCOFF::RelocationType::R_TOC, 15};
+    case MCSymbolRefExpr::VK_PPC_L:
----------------
I am not sure, whether I understand correct or not ?
1. fixup_ppc_half16ds: A 14-bit fixup corresponding to lo16(_foo) with implied 2 zero bits for instrs like 'std'.
2. fixup_ppc_half16dq:  A 16-bit fixup corresponding to lo16(_foo) with implied 3 zero bits for instrs like 'lxv'.
3. fixup_ppc_half16 : A 16-bit fixup corresponding to lo16(_foo) or ha16(_foo) for instrs like 'li' or 'addis'.

in the https://www.ibm.com/docs/en/aix/7.2?topic=formats-xcoff-object-file-format#XCOFF__sua3i125jbau 
r_rsize: 0x3F(6 bits)
Specifies the bit length of the relocatable reference **minus one**. The current architecture allows for fields of up to 32 bits (XCOFF32) or 64 bits (XCOFF64) to be relocated.

so for the
case PPC::fixup_ppc_half16ds: 
    {XCOFF::RelocationType::R_TOC, EncodedSignednessIndicator | 13 } 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122287/new/

https://reviews.llvm.org/D122287



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