[PATCH] D122208: [RISCV] Optimize (select Cond, X, 0) --> and (sext Cond), X

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

Are you sure this is a code size win with RVC? Also much less likely to be macro-op fused; conditional branch followed by a move is one of the things you can easily fuse, and some cores already implement predicated execution for short forward conditional branches.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D122208/new/

https://reviews.llvm.org/D122208