[PATCH] D121491: [AMDGPU] Restrict machine copy propagation from creating unaligned classes

Mon Mar 14 11:00:51 PDT 2022

rampitec added a comment.

In D121491#3376885 <https://reviews.llvm.org/D121491#3376885>, @cdevadas wrote:

> But what's the need to adjust the AV operands beforehand? They'll meet the condition as we have the `_align2` versions for the superclasses available now.

MCP sees a physreg which can be propagated, like in the test: aligned physreg copied into an unaligned physreg. It queries TII of get instruction's operand regclass and then checks if copy destination fits that regclass. If it does MCP performs propagation. Therefore, to prevent it we shall adjust the regclass extracted from the operand desc.

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Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:4777
+    if (Size > 32) {
+      if (SIRegisterInfo::isVGPRClass(RC))
+        RC = RI.getVGPRClassForBitWidth(Size);
----------------
cdevadas wrote:
> Factor this out into a separate function?
> We have the following code already used at least 2 more places in our backend.
Extracted, although I do not see other places where we need exactly the same interface.

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