[PATCH] D108694: [RISCV] Add the zvl extension according to the v1.0-rc1 spec

[Yueh-Ting Chen via Phabricator via llvm-commits]

eopXD added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVSubtarget.cpp:134
          "maximum!");
+  assert(RVVVectorBitsMin >= ZvlLen &&
+         "Minimum V extension vector length should be at least the length "
----------------
kito-cheng wrote:
> I guess this should be more than an assertion? but I am not sure does it make sense to emit error or warning here? or just silently return `ZvlLen` if `RVVVectorBitsMin` is less than `ZvlLen`.
I think the compiler should not return `ZvlLen` silently if the specified `RVVVectorBitsMin` is less. As `zvl` hard restricts the minimum `vlen`, the user should be aware (notified) of that. I think the assertion error here can guide the user to either increase their `RVVVectorBitsMin` in the argument or compile under another architecture specification.


Repository:
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  https://reviews.llvm.org/D108694/new/

https://reviews.llvm.org/D108694