[PATCH] D105989: [AMDGPU] Define and use a helper for setting idxen

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 14 08:20:01 PDT 2021


foad created this revision.
foad added reviewers: arsenm, rampitec, sebastian-ne.
Herald added subscribers: kerbowa, jfb, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
foad requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

In instruction selection consistently set idxen=0 when vindex is known
to be 0. This avoids materializing 0 into a register for various kinds
of buffer loads and stores.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D105989

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.dwordx3.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.dwordx3.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.dwordx3.ll
  llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
  llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll

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