[PATCH] D73607: [X86] Custom lower ISD::FROUND with SSE4.1 to avoid a libcall.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D73607#2806917 <https://reviews.llvm.org/D73607#2806917>, @rtrieu wrote:

> I ran across a llvm_unreachable that points to this commit.  Repro instructions below:
>
> test.ii
>
>   double compare1(double x, double y) { return ((int)x< y) ? x : y; }
>   double compare2(double x, double y) { return y != 0.0 ? y : x; }
>   
>   int compareint(int x, int y, int z) { return (x < y) ? y : (z < x) ? z : x; }
>   
>   class C {
>   public:
>     C(double arg) { 
>       constexpr int k1 = -(1 << 23); 
>       constexpr int k2 = (1 << 23) - 1;
>       array[0] = compareint(arg, k1, k2);
>     }
>     
>     char array[3];
>   };
>   extern "C" double round(double);
>   constexpr double kEight = 8;
>   
>   C create(int b) {
>     double d1 = b * kEight;
>     double d2 = round(d1);
>     double d3 = compare1(0.0, d2);
>     double d4 = compare2(0.0, d3);
>     return C(d4);
>   }
>   
>   void loop(int* b, C *ptr, long j) {
>     for (int i = 0; i < j; ++i)
>       ptr[i] = create(b[i]);
>   }
>
> clang command:
>
>   clang \
>   "-cc1" \
>   "-triple" "x86_64-unknown-linux-gnu" \
>   "-emit-obj" \
>   "-target-cpu" "x86-64" \
>   "-target-feature" "+avx" \
>   "-target-feature" "+avx2" \
>   "-target-feature" "+avx512f" \
>   "-O3" \
>   "-vectorize-loops" \
>   "-x" "c++" "test.ii"
>
> output:
>
>   PromoteIntegerResult #0: t177: v16i24 = X86ISD::VTRUNCS t216
>   
>   Do not know how to promote this operator!
>   UNREACHABLE executed at llvm-project/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:54!
>   
>   0.	Program arguments: clang -cc1 -triple x86_64-unknown-linux-gnu -emit-obj -target-cpu x86-64 -target-feature +avx -target-feature +avx2 -target-feature +avx512f -O3 -vectorize-loops -x c++ test.ii
>   1.	<eof> parser at end of file
>   2.	Code generation
>   3.	Running pass 'Function Pass Manager' on module 'test.ii'.
>   4.	Running pass 'X86 DAG->DAG Instruction Selection' on function '@_Z4loopPiP1Cl'

This should fix it

  diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
  index b89e1674..90babf3 100644
  --- a/llvm/lib/Target/X86/X86ISelLowering.cpp
  +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
  @@ -45273,7 +45273,8 @@ static SDValue combineTruncateWithSat(SDValue In, EVT VT, const SDLoc &DL,
   
     const TargetLowering &TLI = DAG.getTargetLoweringInfo();
     if (TLI.isTypeLegal(InVT) && InVT.isVector() && SVT != MVT::i1 &&
  -      Subtarget.hasAVX512() && (InSVT != MVT::i16 || Subtarget.hasBWI())) {
  +      Subtarget.hasAVX512() && (InSVT != MVT::i16 || Subtarget.hasBWI()) &&
  +      (SVT == MVT::i32 || SVT == MVT::i16 || SVT == MVT::i8)) {
       unsigned TruncOpc = 0;
       SDValue SatVal;
       if (auto SSatVal = detectSSatPattern(In, VT)) {


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73607/new/

https://reviews.llvm.org/D73607